File: MANIFEST.SKIP

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libverilog-perl 3.460-1
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^CVS/
/CVS/
^.git/
,v$
\.(bak|old|new)/
\.(bak|old|new)$
\bMakefile$
^INSTALL$
\.wpsin$
\.texi$
\.tar\.
\.bs$
\.vpassert/.*
\.o$
\.def$
\.dll$
\.exp$
\.tmp$
\.vcs.*$
\.pre\..*$
_pretmp\..*$
VPreLex\.cpp$
simv
.*\.tar\.gz
\bblib\b
nodist/.*
pm_to_blib$
Parser/Parser.c
Parser/VParseBison.*\.cpp
Parser/VParseBison.*\.h
Parser/VParseBison.*\.tab.c
Parser/VParseBison.*\.output
Parser/VParseLex.cpp
Parser/VParseLex_pretmp.cpp
Parser/.*_callbackgen\..*
Parser/.*_cleaned\..*
Preproc/Preproc.c
Preproc/VPreLex_pretmp.cpp
Preproc/.*_cleaned\..*
signals.vrename
test_dir
\.svn/
^(.*/)?MYMETA\..*$