1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
#ifndef LP8758_H
#define LP8758_H
enum lp8758regs {
DEV_REV = 0x00,
OTP_REV = 0x01,
BUCK0_CTRL1 = 0x02,
BUCK0_CTRL2 = 0x03,
BUCK1_CTRL1 = 0x04,
BUCK1_CTRL2 = 0x05,
BUCK2_CTRL1 = 0x06,
BUCK2_CTRL2 = 0x07,
BUCK3_CTRL1 = 0x08,
BUCK3_CTRL2 = 0x09,
BUCK0_VOUT = 0x0a,
BUCK0_FLOOR_VOUT = 0x0b,
BUCK1_VOUT = 0x0c,
BUCK1_FLOOR_VOUT = 0x0d,
BUCK2_VOUT = 0x0e,
BUCK2_FLOOR_VOUT = 0x0f,
BUCK3_VOUT = 0x10,
BUCK3_FLOOR_VOUT = 0x11,
BUCK0_DELAY = 0x12,
BUCK1_DELAY = 0x13,
BUCK2_DELAY = 0x14,
BUCK3_DELAY = 0x15,
RESET = 0x16,
CONFIG = 0x17,
INT_TOP = 0x18,
INT_BUCK_0_1 = 0x19,
INT_BUCK_2_3 = 0x1a,
TOP_STAT = 0x1b,
BUCK_0_1_STAT = 0x1c,
BUCK_2_3_STAT = 0x1d,
TOP_MASK = 0x1e,
BUCK_0_1_MASK = 0x1f,
BUCK_2_3_MASK = 0x20,
SEL_I_LOAD = 0x21,
I_LOAD_2 = 0x22,
I_LOAD_1 = 0x23,
};
#endif // LP8758_H
|
