File: mcfslt.h

package info (click to toggle)
linux 3.2.73-2
  • links: PTS, VCS
  • area: main
  • in suites: wheezy
  • size: 692,996 kB
  • sloc: ansic: 9,719,677; asm: 244,034; xml: 40,377; makefile: 23,845; perl: 16,079; python: 4,929; sh: 4,425; cpp: 3,598; yacc: 2,979; lex: 1,726; awk: 708; pascal: 231; lisp: 218; sed: 30
file content (44 lines) | stat: -rw-r--r-- 1,372 bytes parent folder | download | duplicates (4)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
/****************************************************************************/

/*
 *	mcfslt.h -- ColdFire internal Slice (SLT) timer support defines.
 *
 *	(C) Copyright 2004, Greg Ungerer (gerg@snapgear.com)
 *	(C) Copyright 2009, Philippe De Muyter (phdm@macqel.be)
 */

/****************************************************************************/
#ifndef mcfslt_h
#define mcfslt_h
/****************************************************************************/

/*
 *	Get address specific defines for the 547x.
 */
#define MCFSLT_TIMER0		0x900	/* Base address of TIMER0 */
#define MCFSLT_TIMER1		0x910	/* Base address of TIMER1 */


/*
 *	Define the SLT timer register set addresses.
 */
#define MCFSLT_STCNT		0x00	/* Terminal count */
#define MCFSLT_SCR		0x04	/* Control */
#define MCFSLT_SCNT		0x08	/* Current count */
#define MCFSLT_SSR		0x0C	/* Status */

/*
 *	Bit definitions for the SCR control register.
 */
#define MCFSLT_SCR_RUN		0x04000000	/* Run mode (continuous) */
#define MCFSLT_SCR_IEN		0x02000000	/* Interrupt enable */
#define MCFSLT_SCR_TEN		0x01000000	/* Timer enable */

/*
 *	Bit definitions for the SSR status register.
 */
#define MCFSLT_SSR_BE		0x02000000	/* Bus error condition */
#define MCFSLT_SSR_TE		0x01000000	/* Timeout condition */

/****************************************************************************/
#endif	/* mcfslt_h */