1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
|
/*
* Copyright 2020 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#ifndef __DAL_DCN30_AFMT_H__
#define __DAL_DCN30_AFMT_H__
#define DCN30_AFMT_FROM_AFMT(afmt)\
container_of(afmt, struct dcn30_afmt, base)
#define AFMT_DCN3_REG_LIST(id) \
SRI(AFMT_INFOFRAME_CONTROL0, AFMT, id), \
SRI(AFMT_VBI_PACKET_CONTROL, AFMT, id), \
SRI(AFMT_AUDIO_PACKET_CONTROL, AFMT, id), \
SRI(AFMT_AUDIO_PACKET_CONTROL2, AFMT, id), \
SRI(AFMT_AUDIO_SRC_CONTROL, AFMT, id), \
SRI(AFMT_60958_0, AFMT, id), \
SRI(AFMT_60958_1, AFMT, id), \
SRI(AFMT_60958_2, AFMT, id), \
SRI(AFMT_MEM_PWR, AFMT, id)
struct dcn30_afmt_registers {
uint32_t AFMT_INFOFRAME_CONTROL0;
uint32_t AFMT_VBI_PACKET_CONTROL;
uint32_t AFMT_AUDIO_PACKET_CONTROL;
uint32_t AFMT_AUDIO_PACKET_CONTROL2;
uint32_t AFMT_AUDIO_SRC_CONTROL;
uint32_t AFMT_60958_0;
uint32_t AFMT_60958_1;
uint32_t AFMT_60958_2;
uint32_t AFMT_MEM_PWR;
};
#define DCN3_AFMT_MASK_SH_LIST(mask_sh)\
SE_SF(AFMT0_AFMT_INFOFRAME_CONTROL0, AFMT_AUDIO_INFO_UPDATE, mask_sh),\
SE_SF(AFMT0_AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT, mask_sh),\
SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, mask_sh),\
SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, mask_sh),\
SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_LAYOUT_OVRD, mask_sh),\
SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_60958_OSF_OVRD, mask_sh),\
SE_SF(AFMT0_AFMT_60958_0, AFMT_60958_CS_CHANNEL_NUMBER_L, mask_sh),\
SE_SF(AFMT0_AFMT_60958_0, AFMT_60958_CS_CLOCK_ACCURACY, mask_sh),\
SE_SF(AFMT0_AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\
SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, mask_sh),\
SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, mask_sh),\
SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, mask_sh),\
SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, mask_sh),\
SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, mask_sh),\
SE_SF(AFMT0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, mask_sh),\
SE_SF(AFMT0_AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, mask_sh),\
SE_SF(AFMT0_AFMT_MEM_PWR, AFMT_MEM_PWR_FORCE, mask_sh)
#define AFMT_DCN3_REG_FIELD_LIST(type) \
type AFMT_AUDIO_INFO_UPDATE;\
type AFMT_AUDIO_SRC_SELECT;\
type AFMT_AUDIO_CHANNEL_ENABLE;\
type AFMT_60958_CS_UPDATE;\
type AFMT_AUDIO_LAYOUT_OVRD;\
type AFMT_60958_OSF_OVRD;\
type AFMT_60958_CS_CHANNEL_NUMBER_L;\
type AFMT_60958_CS_CLOCK_ACCURACY;\
type AFMT_60958_CS_CHANNEL_NUMBER_R;\
type AFMT_60958_CS_CHANNEL_NUMBER_2;\
type AFMT_60958_CS_CHANNEL_NUMBER_3;\
type AFMT_60958_CS_CHANNEL_NUMBER_4;\
type AFMT_60958_CS_CHANNEL_NUMBER_5;\
type AFMT_60958_CS_CHANNEL_NUMBER_6;\
type AFMT_60958_CS_CHANNEL_NUMBER_7;\
type AFMT_AUDIO_SAMPLE_SEND;\
type AFMT_MEM_PWR_FORCE
struct dcn30_afmt_shift {
AFMT_DCN3_REG_FIELD_LIST(uint8_t);
};
struct dcn30_afmt_mask {
AFMT_DCN3_REG_FIELD_LIST(uint32_t);
};
/**
* speakersToChannels
*
* @brief
* translate speakers to channels
*
* FL - Front Left
* FR - Front Right
* RL - Rear Left
* RR - Rear Right
* RC - Rear Center
* FC - Front Center
* FLC - Front Left Center
* FRC - Front Right Center
* RLC - Rear Left Center
* RRC - Rear Right Center
* LFE - Low Freq Effect
*
* FC
* FLC FRC
* FL FR
*
* LFE
* ()
*
*
* RL RR
* RLC RRC
* RC
*
* ch 8 7 6 5 4 3 2 1
* 0b00000011 - - - - - - FR FL
* 0b00000111 - - - - - LFE FR FL
* 0b00001011 - - - - FC - FR FL
* 0b00001111 - - - - FC LFE FR FL
* 0b00010011 - - - RC - - FR FL
* 0b00010111 - - - RC - LFE FR FL
* 0b00011011 - - - RC FC - FR FL
* 0b00011111 - - - RC FC LFE FR FL
* 0b00110011 - - RR RL - - FR FL
* 0b00110111 - - RR RL - LFE FR FL
* 0b00111011 - - RR RL FC - FR FL
* 0b00111111 - - RR RL FC LFE FR FL
* 0b01110011 - RC RR RL - - FR FL
* 0b01110111 - RC RR RL - LFE FR FL
* 0b01111011 - RC RR RL FC - FR FL
* 0b01111111 - RC RR RL FC LFE FR FL
* 0b11110011 RRC RLC RR RL - - FR FL
* 0b11110111 RRC RLC RR RL - LFE FR FL
* 0b11111011 RRC RLC RR RL FC - FR FL
* 0b11111111 RRC RLC RR RL FC LFE FR FL
* 0b11000011 FRC FLC - - - - FR FL
* 0b11000111 FRC FLC - - - LFE FR FL
* 0b11001011 FRC FLC - - FC - FR FL
* 0b11001111 FRC FLC - - FC LFE FR FL
* 0b11010011 FRC FLC - RC - - FR FL
* 0b11010111 FRC FLC - RC - LFE FR FL
* 0b11011011 FRC FLC - RC FC - FR FL
* 0b11011111 FRC FLC - RC FC LFE FR FL
* 0b11110011 FRC FLC RR RL - - FR FL
* 0b11110111 FRC FLC RR RL - LFE FR FL
* 0b11111011 FRC FLC RR RL FC - FR FL
* 0b11111111 FRC FLC RR RL FC LFE FR FL
*
* @param
* speakers - speaker information as it comes from CEA audio block
*/
/* translate speakers to channels */
union audio_cea_channels {
uint8_t all;
struct audio_cea_channels_bits {
uint32_t FL:1;
uint32_t FR:1;
uint32_t LFE:1;
uint32_t FC:1;
uint32_t RL_RC:1;
uint32_t RR:1;
uint32_t RC_RLC_FLC:1;
uint32_t RRC_FRC:1;
} channels;
};
struct afmt;
struct afmt_funcs {
void (*setup_hdmi_audio)(
struct afmt *afmt);
void (*se_audio_setup)(
struct afmt *afmt,
unsigned int az_inst,
struct audio_info *audio_info);
void (*audio_mute_control)(
struct afmt *afmt,
bool mute);
void (*audio_info_immediate_update)(
struct afmt *afmt);
void (*setup_dp_audio)(
struct afmt *afmt);
};
struct afmt {
const struct afmt_funcs *funcs;
struct dc_context *ctx;
int inst;
};
struct dcn30_afmt {
struct afmt base;
const struct dcn30_afmt_registers *regs;
const struct dcn30_afmt_shift *afmt_shift;
const struct dcn30_afmt_mask *afmt_mask;
};
void afmt3_construct(struct dcn30_afmt *afmt3,
struct dc_context *ctx,
uint32_t inst,
const struct dcn30_afmt_registers *afmt_regs,
const struct dcn30_afmt_shift *afmt_shift,
const struct dcn30_afmt_mask *afmt_mask);
#endif
|
