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// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZC1275
*
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
/ {
model = "ZynqMP ZC1275 RevA";
compatible = "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275", "xlnx,zynqmp";
aliases {
serial0 = &uart0;
serial1 = &dcc;
spi0 = &qspi;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
};
&dcc {
status = "okay";
};
&gpio {
status = "okay";
};
&qspi {
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>;
};
};
&uart0 {
status = "okay";
};
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