1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
|
/* SPDX-License-Identifier: GPL-2.0 */
/* Marvell Octeon EP (EndPoint) Ethernet Driver
*
* Copyright (C) 2020 Marvell.
*
*/
#ifndef _OCTEP_PFVF_MBOX_H_
#define _OCTEP_PFVF_MBOX_H_
#define OCTEON_SDP_16K_HW_FRS 16380UL
#define OCTEON_SDP_64K_HW_FRS 65531UL
/* When a new command is implemented,PF Mbox version should be bumped.
*/
enum octep_pfvf_mbox_version {
OCTEP_PFVF_MBOX_VERSION_V0,
OCTEP_PFVF_MBOX_VERSION_V1,
OCTEP_PFVF_MBOX_VERSION_V2,
};
#define OCTEP_PFVF_MBOX_VERSION_CURRENT OCTEP_PFVF_MBOX_VERSION_V2
/* VF flags */
/* PF has set VF MAC address */
#define OCTEON_PFVF_FLAG_MAC_SET_BY_PF BIT(0)
enum octep_pfvf_mbox_opcode {
OCTEP_PFVF_MBOX_CMD_VERSION,
OCTEP_PFVF_MBOX_CMD_SET_MTU,
OCTEP_PFVF_MBOX_CMD_SET_MAC_ADDR,
OCTEP_PFVF_MBOX_CMD_GET_MAC_ADDR,
OCTEP_PFVF_MBOX_CMD_GET_LINK_INFO,
OCTEP_PFVF_MBOX_CMD_GET_STATS,
OCTEP_PFVF_MBOX_CMD_SET_RX_STATE,
OCTEP_PFVF_MBOX_CMD_SET_LINK_STATUS,
OCTEP_PFVF_MBOX_CMD_GET_LINK_STATUS,
OCTEP_PFVF_MBOX_CMD_GET_MTU,
OCTEP_PFVF_MBOX_CMD_DEV_REMOVE,
OCTEP_PFVF_MBOX_CMD_GET_FW_INFO,
OCTEP_PFVF_MBOX_CMD_SET_OFFLOADS,
OCTEP_PFVF_MBOX_NOTIF_LINK_STATUS,
OCTEP_PFVF_MBOX_CMD_MAX,
};
enum octep_pfvf_mbox_word_type {
OCTEP_PFVF_MBOX_TYPE_CMD,
OCTEP_PFVF_MBOX_TYPE_RSP_ACK,
OCTEP_PFVF_MBOX_TYPE_RSP_NACK,
};
enum octep_pfvf_mbox_cmd_status {
OCTEP_PFVF_MBOX_CMD_STATUS_NOT_SETUP = 1,
OCTEP_PFVF_MBOX_CMD_STATUS_TIMEDOUT = 2,
OCTEP_PFVF_MBOX_CMD_STATUS_NACK = 3,
OCTEP_PFVF_MBOX_CMD_STATUS_BUSY = 4
};
enum octep_pfvf_mbox_state {
OCTEP_PFVF_MBOX_STATE_IDLE = 0,
OCTEP_PFVF_MBOX_STATE_BUSY = 1,
};
enum octep_pfvf_link_status {
OCTEP_PFVF_LINK_STATUS_DOWN,
OCTEP_PFVF_LINK_STATUS_UP,
};
enum octep_pfvf_link_speed {
OCTEP_PFVF_LINK_SPEED_NONE,
OCTEP_PFVF_LINK_SPEED_1000,
OCTEP_PFVF_LINK_SPEED_10000,
OCTEP_PFVF_LINK_SPEED_25000,
OCTEP_PFVF_LINK_SPEED_40000,
OCTEP_PFVF_LINK_SPEED_50000,
OCTEP_PFVF_LINK_SPEED_100000,
OCTEP_PFVF_LINK_SPEED_LAST,
};
enum octep_pfvf_link_duplex {
OCTEP_PFVF_LINK_HALF_DUPLEX,
OCTEP_PFVF_LINK_FULL_DUPLEX,
};
enum octep_pfvf_link_autoneg {
OCTEP_PFVF_LINK_AUTONEG,
OCTEP_PFVF_LINK_FIXED,
};
#define OCTEP_PFVF_MBOX_TIMEOUT_MS 500
#define OCTEP_PFVF_MBOX_MAX_RETRIES 2
#define OCTEP_PFVF_MBOX_MAX_DATA_SIZE 6
#define OCTEP_PFVF_MBOX_MORE_FRAG_FLAG 1
#define OCTEP_PFVF_MBOX_WRITE_WAIT_TIME msecs_to_jiffies(1)
union octep_pfvf_mbox_word {
u64 u64;
struct {
u64 opcode:8;
u64 type:2;
u64 rsvd:6;
u64 data:48;
} s;
struct {
u64 opcode:8;
u64 type:2;
u64 frag:1;
u64 rsvd:5;
u8 data[6];
} s_data;
struct {
u64 opcode:8;
u64 type:2;
u64 rsvd:6;
u64 version:48;
} s_version;
struct {
u64 opcode:8;
u64 type:2;
u64 rsvd:6;
u8 mac_addr[6];
} s_set_mac;
struct {
u64 opcode:8;
u64 type:2;
u64 rsvd:6;
u64 mtu:48;
} s_set_mtu;
struct {
u64 opcode:8;
u64 type:2;
u64 rsvd:6;
u64 mtu:48;
} s_get_mtu;
struct {
u64 opcode:8;
u64 type:2;
u64 state:1;
u64 rsvd:53;
} s_link_state;
struct {
u64 opcode:8;
u64 type:2;
u64 status:1;
u64 rsvd:53;
} s_link_status;
struct {
u64 opcode:8;
u64 type:2;
u64 pkind:8;
u64 fsz:8;
u64 rx_ol_flags:16;
u64 tx_ol_flags:16;
u64 rsvd:6;
} s_fw_info;
struct {
u64 opcode:8;
u64 type:2;
u64 rsvd:22;
u64 rx_ol_flags:16;
u64 tx_ol_flags:16;
} s_offloads;
} __packed;
void octep_pfvf_mbox_work(struct work_struct *work);
int octep_setup_pfvf_mbox(struct octep_device *oct);
void octep_delete_pfvf_mbox(struct octep_device *oct);
void octep_pfvf_notify(struct octep_device *oct, struct octep_ctrl_mbox_msg *msg);
#endif
|
