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// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com
// Copyright 2018 Google, Inc.
#include "nuvoton-common-npcm7xx.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "nuvoton,npcm750-smp";
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
clocks = <&clk NPCM7XX_CLK_CPU>;
clock-names = "clk_cpu";
reg = <0>;
next-level-cache = <&l2>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
clocks = <&clk NPCM7XX_CLK_CPU>;
clock-names = "clk_cpu";
reg = <1>;
next-level-cache = <&l2>;
};
};
soc {
timer@3fe600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x3fe600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&clk NPCM7XX_CLK_AHB>;
};
};
ahb {
gmac1: eth@f0804000 {
device_type = "network";
compatible = "snps,dwmac";
reg = <0xf0804000 0x2000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
ethernet = <1>;
clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>;
clock-names = "stmmaceth", "clk_gmac";
pinctrl-names = "default";
pinctrl-0 = <&rg2_pins
&rg2mdio_pins>;
status = "disabled";
};
udc0: usb@f0830000 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0830000 0x1000
0xfffd0000 0x800>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
phys = <&udc0_phy>;
phy_type = "utmi_wide";
dr_mode = "peripheral";
status = "disabled";
};
udc1: usb@f0831000 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0831000 0x1000
0xfffd0800 0x800>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
phys = <&udc0_phy>;
phy_type = "utmi_wide";
dr_mode = "peripheral";
status = "disabled";
};
udc2: usb@f0832000 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0832000 0x1000
0xfffd1000 0x800>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
phys = <&udc0_phy>;
phy_type = "utmi_wide";
dr_mode = "peripheral";
status = "disabled";
};
udc3: usb@f0833000 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0833000 0x1000
0xfffd1800 0x800>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
phys = <&udc0_phy>;
phy_type = "utmi_wide";
dr_mode = "peripheral";
status = "disabled";
};
udc4: usb@f0834000 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0834000 0x1000
0xfffd2000 0x800>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
phys = <&udc0_phy>;
phy_type = "utmi_wide";
dr_mode = "peripheral";
status = "disabled";
};
};
};
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