1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Loongson-3 HyperTransport Interrupt Vector Controller
maintainers:
- Jiaxun Yang <jiaxun.yang@flygoat.com>
description:
This interrupt controller is found in the Loongson-3 family of chips for
receiving vectorized interrupts from PCH's interrupt controller.
properties:
compatible:
const: loongson,htvec-1.0
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 8
description: Eight parent interrupts that receive chained interrupts.
interrupt-controller: true
'#interrupt-cells':
const: 1
required:
- compatible
- reg
- interrupts
- interrupt-controller
- '#interrupt-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
htvec: interrupt-controller@fb000080 {
compatible = "loongson,htvec-1.0";
reg = <0xfb000080 0x40>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&liointc>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
<25 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>;
};
...
|
