1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
|
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
#ifndef _DT_BINDINGS_CLK_MT6735_INFRACFG_H
#define _DT_BINDINGS_CLK_MT6735_INFRACFG_H
#define CLK_INFRA_DBG 0
#define CLK_INFRA_GCE 1
#define CLK_INFRA_TRBG 2
#define CLK_INFRA_CPUM 3
#define CLK_INFRA_DEVAPC 4
#define CLK_INFRA_AUDIO 5
#define CLK_INFRA_GCPU 6
#define CLK_INFRA_L2C_SRAM 7
#define CLK_INFRA_M4U 8
#define CLK_INFRA_CLDMA 9
#define CLK_INFRA_CONNMCU_BUS 10
#define CLK_INFRA_KP 11
#define CLK_INFRA_APXGPT 12
#define CLK_INFRA_SEJ 13
#define CLK_INFRA_CCIF0_AP 14
#define CLK_INFRA_CCIF1_AP 15
#define CLK_INFRA_PMIC_SPI 16
#define CLK_INFRA_PMIC_WRAP 17
#endif
|
