1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
|
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mediatek,ethsys.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek ethsys controller
description:
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
maintainers:
- James Liao <jamesjj.liao@mediatek.com>
properties:
compatible:
oneOf:
- items:
- enum:
- mediatek,mt2701-ethsys
- mediatek,mt7622-ethsys
- mediatek,mt7629-ethsys
- mediatek,mt7981-ethsys
- mediatek,mt7986-ethsys
- mediatek,mt7988-ethsys
- const: syscon
- items:
- const: mediatek,mt7623-ethsys
- const: mediatek,mt2701-ethsys
- const: syscon
reg:
maxItems: 1
"#clock-cells":
const: 1
"#reset-cells":
const: 1
required:
- reg
- "#clock-cells"
- "#reset-cells"
additionalProperties: false
examples:
- |
clock-controller@1b000000 {
compatible = "mediatek,mt2701-ethsys", "syscon";
reg = <0x1b000000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
|