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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/marvell,odmi-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell ODMI controller
maintainers:
- Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
description:
Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller which can
be used by on-board peripherals for MSI interrupts.
properties:
compatible:
const: marvell,odmi-controller
reg:
description: List of register definitions, one for each ODMI frame.
msi-controller: true
marvell,odmi-frames:
description: Number of ODMI frames available. Each frame provides a number of events.
$ref: /schemas/types.yaml#/definitions/uint32
marvell,spi-base:
description: >
List of GIC base SPI interrupts, one for each ODMI frame. Those SPI
interrupts are 0-based, i.e. marvell,spi-base = <128> will use SPI #96.
See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
for details.
$ref: /schemas/types.yaml#/definitions/uint32-array
required:
- compatible
- reg
- msi-controller
- marvell,odmi-frames
- marvell,spi-base
additionalProperties: false
examples:
- |
msi-controller@300000 {
compatible = "marvell,odmi-controller";
msi-controller;
marvell,odmi-frames = <4>;
reg = <0x300000 0x4000>, <0x304000 0x4000>, <0x308000 0x4000>, <0x30C000 0x4000>;
marvell,spi-base = <128>, <136>, <144>, <152>;
};
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