1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
|
; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -disable-cgp-branch-opts | FileCheck %s
define i32 @f1() {
; CHECK: f1
; CHECK: mov r0, #0
ret i32 0
}
define i32 @f2() {
; CHECK: f2
; CHECK: mov r0, #255
ret i32 255
}
define i32 @f3() {
; CHECK: f3
; CHECK: mov r0, #256
ret i32 256
}
define i32 @f4() {
; CHECK: f4
; CHECK: orr{{.*}}#256
ret i32 257
}
define i32 @f5() {
; CHECK: f5
; CHECK: mov r0, #-1073741761
ret i32 -1073741761
}
define i32 @f6() {
; CHECK: f6
; CHECK: mov r0, #1008
ret i32 1008
}
define void @f7(i32 %a) {
; CHECK: f7
; CHECK: cmp r0, #65536
%b = icmp ugt i32 %a, 65536
br i1 %b, label %r, label %r
r:
ret void
}
%t1 = type { <3 x float>, <3 x float> }
@const1 = global %t1 { <3 x float> zeroinitializer,
<3 x float> <float 1.000000e+00,
float 2.000000e+00,
float 3.000000e+00> }, align 16
; CHECK: const1
; CHECK: .zero 16
; CHECK: float 1.0
; CHECK: float 2.0
; CHECK: float 3.0
; CHECK: .zero 4
|