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|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
define void @lr_other_block() { ret void }
define void @already_live_in() { ret void }
declare i8* @llvm.returnaddress(i32 immarg)
...
---
name: lr_other_block
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: lr_other_block
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x80000000)
; CHECK: liveins: $w0, $x0, $lr
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $lr
; CHECK: B %bb.1
; CHECK: bb.1:
; CHECK: $x0 = COPY [[COPY]]
; CHECK: RET_ReallyLR implicit $x0
; LR should be added as a livein to the entry block.
bb.0:
; We should have lr as a livein to bb.0, and a copy from LR.
liveins: $w0, $x0
G_BR %bb.1
bb.1:
%4:gpr(p0) = G_INTRINSIC intrinsic(@llvm.returnaddress), 0
$x0 = COPY %4
RET_ReallyLR implicit $x0
...
---
name: already_live_in
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: already_live_in
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x80000000)
; CHECK: liveins: $w0, $x0, $lr
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $lr
; CHECK: B %bb.1
; CHECK: bb.1:
; CHECK: $x0 = COPY [[COPY]]
; CHECK: RET_ReallyLR implicit $x0
; We should not have LR listed as a livein twice.
bb.0:
liveins: $w0, $x0, $lr
G_BR %bb.1
bb.1:
%4:gpr(p0) = G_INTRINSIC intrinsic(@llvm.returnaddress), 0
$x0 = COPY %4
RET_ReallyLR implicit $x0
...
|
