1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=amdgcn -mcpu=tahiti -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefixes=GCN,FMA %s
; RUN: llc -march=amdgcn -mcpu=verde -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefixes=GCN,NOFUSE %s
; RUN: llc -march=amdgcn -mcpu=fiji -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefixes=GCN,NOFUSE %s
; RUN: llc -march=amdgcn -mcpu=tonga -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefixes=GCN,NOFUSE %s
; RUN: llc -march=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefixes=GCN,FMA %s
; RUN: llc -march=amdgcn -mcpu=tahiti -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GCN,FMAD %s
; RUN: llc -march=amdgcn -mcpu=verde -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GCN,FMAD %s
; RUN: llc -march=amdgcn -mcpu=fiji -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GCN,FMAD %s
; RUN: llc -march=amdgcn -mcpu=tonga -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GCN,FMAD %s
; RUN: llc -march=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GCN,FMAD %s
; Check for incorrect fmad formation when distributing
define float @unsafe_fmul_fadd_distribute_fast_f32(float %arg0, float %arg1) #0 {
; FMA-LABEL: unsafe_fmul_fadd_distribute_fast_f32:
; FMA: ; %bb.0:
; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMA-NEXT: v_fma_f32 v0, v1, v0, v0
; FMA-NEXT: s_setpc_b64 s[30:31]
;
; NOFUSE-LABEL: unsafe_fmul_fadd_distribute_fast_f32:
; NOFUSE: ; %bb.0:
; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; NOFUSE-NEXT: v_add_f32_e32 v1, 1.0, v1
; NOFUSE-NEXT: v_mul_f32_e32 v0, v0, v1
; NOFUSE-NEXT: s_setpc_b64 s[30:31]
;
; FMAD-LABEL: unsafe_fmul_fadd_distribute_fast_f32:
; FMAD: ; %bb.0:
; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMAD-NEXT: v_mac_f32_e32 v0, v1, v0
; FMAD-NEXT: s_setpc_b64 s[30:31]
%add = fadd fast float %arg1, 1.0
%tmp1 = fmul fast float %arg0, %add
ret float %tmp1
}
define float @unsafe_fmul_fsub_distribute_fast_f32(float %arg0, float %arg1) #0 {
; FMA-LABEL: unsafe_fmul_fsub_distribute_fast_f32:
; FMA: ; %bb.0:
; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMA-NEXT: v_fma_f32 v0, -v1, v0, v0
; FMA-NEXT: s_setpc_b64 s[30:31]
;
; NOFUSE-LABEL: unsafe_fmul_fsub_distribute_fast_f32:
; NOFUSE: ; %bb.0:
; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; NOFUSE-NEXT: v_sub_f32_e32 v1, 1.0, v1
; NOFUSE-NEXT: v_mul_f32_e32 v0, v0, v1
; NOFUSE-NEXT: s_setpc_b64 s[30:31]
;
; FMAD-LABEL: unsafe_fmul_fsub_distribute_fast_f32:
; FMAD: ; %bb.0:
; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMAD-NEXT: v_mad_f32 v0, -v1, v0, v0
; FMAD-NEXT: s_setpc_b64 s[30:31]
%add = fsub fast float 1.0, %arg1
%tmp1 = fmul fast float %arg0, %add
ret float %tmp1
}
define <2 x float> @unsafe_fmul_fadd_distribute_fast_v2f32(<2 x float> %arg0, <2 x float> %arg1) #0 {
; FMA-LABEL: unsafe_fmul_fadd_distribute_fast_v2f32:
; FMA: ; %bb.0:
; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMA-NEXT: v_fma_f32 v0, v2, v0, v0
; FMA-NEXT: v_fma_f32 v1, v3, v1, v1
; FMA-NEXT: s_setpc_b64 s[30:31]
;
; NOFUSE-LABEL: unsafe_fmul_fadd_distribute_fast_v2f32:
; NOFUSE: ; %bb.0:
; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; NOFUSE-NEXT: v_add_f32_e32 v3, 1.0, v3
; NOFUSE-NEXT: v_add_f32_e32 v2, 1.0, v2
; NOFUSE-NEXT: v_mul_f32_e32 v0, v0, v2
; NOFUSE-NEXT: v_mul_f32_e32 v1, v1, v3
; NOFUSE-NEXT: s_setpc_b64 s[30:31]
;
; FMAD-LABEL: unsafe_fmul_fadd_distribute_fast_v2f32:
; FMAD: ; %bb.0:
; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMAD-NEXT: v_mac_f32_e32 v0, v2, v0
; FMAD-NEXT: v_mac_f32_e32 v1, v3, v1
; FMAD-NEXT: s_setpc_b64 s[30:31]
%add = fadd fast <2 x float> %arg1, <float 1.0, float 1.0>
%tmp1 = fmul fast <2 x float> %arg0, %add
ret <2 x float> %tmp1
}
define <2 x float> @unsafe_fmul_fsub_distribute_fast_v2f32(<2 x float> %arg0, <2 x float> %arg1) #0 {
; FMA-LABEL: unsafe_fmul_fsub_distribute_fast_v2f32:
; FMA: ; %bb.0:
; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMA-NEXT: v_fma_f32 v0, -v2, v0, v0
; FMA-NEXT: v_fma_f32 v1, -v3, v1, v1
; FMA-NEXT: s_setpc_b64 s[30:31]
;
; NOFUSE-LABEL: unsafe_fmul_fsub_distribute_fast_v2f32:
; NOFUSE: ; %bb.0:
; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; NOFUSE-NEXT: v_sub_f32_e32 v3, 1.0, v3
; NOFUSE-NEXT: v_sub_f32_e32 v2, 1.0, v2
; NOFUSE-NEXT: v_mul_f32_e32 v0, v0, v2
; NOFUSE-NEXT: v_mul_f32_e32 v1, v1, v3
; NOFUSE-NEXT: s_setpc_b64 s[30:31]
;
; FMAD-LABEL: unsafe_fmul_fsub_distribute_fast_v2f32:
; FMAD: ; %bb.0:
; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMAD-NEXT: v_mad_f32 v0, -v2, v0, v0
; FMAD-NEXT: v_mad_f32 v1, -v3, v1, v1
; FMAD-NEXT: s_setpc_b64 s[30:31]
%add = fsub fast <2 x float> <float 1.0, float 1.0>, %arg1
%tmp1 = fmul fast <2 x float> %arg0, %add
ret <2 x float> %tmp1
}
define <2 x float> @unsafe_fast_fmul_fadd_distribute_post_legalize_f32(float %arg0, <2 x float> %arg1) #0 {
; FMA-LABEL: unsafe_fast_fmul_fadd_distribute_post_legalize_f32:
; FMA: ; %bb.0:
; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMA-NEXT: v_fma_f32 v0, v0, v1, v1
; FMA-NEXT: s_setpc_b64 s[30:31]
;
; NOFUSE-LABEL: unsafe_fast_fmul_fadd_distribute_post_legalize_f32:
; NOFUSE: ; %bb.0:
; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; NOFUSE-NEXT: v_add_f32_e32 v0, 1.0, v0
; NOFUSE-NEXT: v_mul_f32_e32 v0, v1, v0
; NOFUSE-NEXT: s_setpc_b64 s[30:31]
;
; FMAD-LABEL: unsafe_fast_fmul_fadd_distribute_post_legalize_f32:
; FMAD: ; %bb.0:
; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMAD-NEXT: v_mad_f32 v0, v0, v1, v1
; FMAD-NEXT: s_setpc_b64 s[30:31]
%add = fadd fast float %arg0, 1.0
%splat = insertelement <2 x float> undef, float %add, i32 0
%tmp1 = fmul fast <2 x float> %arg1, %splat
ret <2 x float> %tmp1
}
define <2 x float> @unsafe_fast_fmul_fsub_ditribute_post_legalize(float %arg0, <2 x float> %arg1) #0 {
; FMA-LABEL: unsafe_fast_fmul_fsub_ditribute_post_legalize:
; FMA: ; %bb.0:
; FMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMA-NEXT: v_fma_f32 v0, -v0, v1, v1
; FMA-NEXT: s_setpc_b64 s[30:31]
;
; NOFUSE-LABEL: unsafe_fast_fmul_fsub_ditribute_post_legalize:
; NOFUSE: ; %bb.0:
; NOFUSE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; NOFUSE-NEXT: v_sub_f32_e32 v0, 1.0, v0
; NOFUSE-NEXT: v_mul_f32_e32 v0, v1, v0
; NOFUSE-NEXT: s_setpc_b64 s[30:31]
;
; FMAD-LABEL: unsafe_fast_fmul_fsub_ditribute_post_legalize:
; FMAD: ; %bb.0:
; FMAD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FMAD-NEXT: v_mad_f32 v0, -v0, v1, v1
; FMAD-NEXT: s_setpc_b64 s[30:31]
%sub = fsub fast float 1.0, %arg0
%splat = insertelement <2 x float> undef, float %sub, i32 0
%tmp1 = fmul fast <2 x float> %arg1, %splat
ret <2 x float> %tmp1
}
attributes #0 = { "no-infs-fp-math"="true" "unsafe-fp-math"="true" }
|