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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple arm-- -mattr=+neon -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
define void @test_add_s64() { ret void }
define void @test_sub_s64() { ret void }
...
---
name: test_add_s64
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: fprb }
- { id: 1, class: fprb }
- { id: 2, class: fprb }
body: |
bb.0:
liveins: $d0, $d1
; CHECK-LABEL: name: test_add_s64
; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0
; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1
; CHECK: [[VADDv1i64_:%[0-9]+]]:dpr = VADDv1i64 [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg
; CHECK: $d0 = COPY [[VADDv1i64_]]
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $d0
%0(s64) = COPY $d0
%1(s64) = COPY $d1
%2(s64) = G_ADD %0, %1
$d0 = COPY %2(s64)
BX_RET 14, $noreg, implicit $d0
...
---
name: test_sub_s64
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: fprb }
- { id: 1, class: fprb }
- { id: 2, class: fprb }
body: |
bb.0:
liveins: $d0, $d1
; CHECK-LABEL: name: test_sub_s64
; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0
; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1
; CHECK: [[VSUBv1i64_:%[0-9]+]]:dpr = VSUBv1i64 [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg
; CHECK: $d0 = COPY [[VSUBv1i64_]]
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $d0
%0(s64) = COPY $d0
%1(s64) = COPY $d1
%2(s64) = G_SUB %0, %1
$d0 = COPY %2(s64)
BX_RET 14, $noreg, implicit $d0
|
