File: inline-asm-mem-clobber.ll

package info (click to toggle)
llvm-toolchain-11 1%3A11.0.1-2
  • links: PTS, VCS
  • area: main
  • in suites: bullseye
  • size: 995,808 kB
  • sloc: cpp: 4,767,656; ansic: 760,916; asm: 477,436; python: 170,940; objc: 69,804; lisp: 29,914; sh: 23,855; f90: 18,173; pascal: 7,551; perl: 7,471; ml: 5,603; awk: 3,489; makefile: 2,573; xml: 915; cs: 573; fortran: 503; javascript: 452
file content (24 lines) | stat: -rw-r--r-- 619 bytes parent folder | download | duplicates (8) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
 
; RUN: llc -O2 -no-integrated-as < %s | FileCheck %s

; Test uses 32-bit registers which aren't supported on AVR.
; XFAIL: avr

@G = common global i32 0, align 4

define i32 @foo(i8* %p) nounwind uwtable {
entry:
  %p.addr = alloca i8*, align 8
  %rv = alloca i32, align 4
  store i8* %p, i8** %p.addr, align 8
  store i32 0, i32* @G, align 4
  %0 = load i8*, i8** %p.addr, align 8
; CHECK: blah
  %1 = call i32 asm "blah", "=r,r,~{memory}"(i8* %0) nounwind
; CHECK: @G
  store i32 %1, i32* %rv, align 4
  %2 = load i32, i32* %rv, align 4
  %3 = load i32, i32* @G, align 4
  %add = add nsw i32 %2, %3
  ret i32 %add
}