File: prefetch-shuffler-ice.ll

package info (click to toggle)
llvm-toolchain-11 1%3A11.0.1-2
  • links: PTS, VCS
  • area: main
  • in suites: bullseye
  • size: 995,808 kB
  • sloc: cpp: 4,767,656; ansic: 760,916; asm: 477,436; python: 170,940; objc: 69,804; lisp: 29,914; sh: 23,855; f90: 18,173; pascal: 7,551; perl: 7,471; ml: 5,603; awk: 3,489; makefile: 2,573; xml: 915; cs: 573; fortran: 503; javascript: 452
file content (24 lines) | stat: -rw-r--r-- 586 bytes parent folder | download | duplicates (14) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
 
; RUN: llc -march=hexagon -O2 < %s
; REQUIRES: asserts
; Expect successful compilation.

target triple = "hexagon"

; Function Attrs: nounwind optsize
define void @f0(i32* nocapture %a0, i8* %a1) #0 {
b0:
  call void @llvm.hexagon.prefetch(i8* %a1)
  store i32 0, i32* %a0, align 4, !tbaa !0
  ret void
}

; Function Attrs: nounwind
declare void @llvm.hexagon.prefetch(i8*) #1

attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" }
attributes #1 = { nounwind }

!0 = !{!1, !1, i64 0}
!1 = !{!"int", !2, i64 0}
!2 = !{!"omnipotent char", !3, i64 0}
!3 = !{!"Simple C/C++ TBAA"}