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|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
@float_align1 = common global float 0.000000e+00, align 1
@float_align4 = common global float 0.000000e+00, align 4
@i32_align8 = common global i32 0, align 8
define void @store_float_align1(float %a) {
entry:
store float %a, float* @float_align1, align 1
ret void
}
define void @store_float_align4(float %a) {
entry:
store float %a, float* @float_align4, align 4
ret void
}
define void @store_i32_align8(i32 signext %a) {
entry:
store i32 %a, i32* @i32_align8, align 8
ret void
}
...
---
name: store_float_align1
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; MIPS32-LABEL: name: store_float_align1
; MIPS32: liveins: $f12
; MIPS32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @float_align1
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @float_align1
; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
; MIPS32: SWL [[COPY1]], [[ADDiu]], 3 :: (store 4 into @float_align1, align 1)
; MIPS32: SWR [[COPY1]], [[ADDiu]], 0 :: (store 4 into @float_align1, align 1)
; MIPS32: RetRA
%0:fprb(s32) = COPY $f12
%1:gprb(p0) = G_GLOBAL_VALUE @float_align1
%2:gprb(s32) = COPY %0(s32)
G_STORE %2(s32), %1(p0) :: (store 4 into @float_align1, align 1)
RetRA
...
---
name: store_float_align4
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; MIPS32-LABEL: name: store_float_align4
; MIPS32: liveins: $f12
; MIPS32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @float_align4
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @float_align4
; MIPS32: SWC1 [[COPY]], [[ADDiu]], 0 :: (store 4 into @float_align4)
; MIPS32: RetRA
%0:fprb(s32) = COPY $f12
%1:gprb(p0) = G_GLOBAL_VALUE @float_align4
G_STORE %0(s32), %1(p0) :: (store 4 into @float_align4)
RetRA
...
---
name: store_i32_align8
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: store_i32_align8
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @i32_align8
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @i32_align8
; MIPS32: SW [[COPY]], [[ADDiu]], 0 :: (store 4 into @i32_align8, align 8)
; MIPS32: RetRA
%0:gprb(s32) = COPY $a0
%1:gprb(p0) = G_GLOBAL_VALUE @i32_align8
G_STORE %0(s32), %1(p0) :: (store 4 into @i32_align8, align 8)
RetRA
...
|
