File: armv8.1a-lor.txt

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llvm-toolchain-11 1%3A11.0.1-2
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# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a --disassemble < %s | FileCheck %s

0x20,0x7c,0xdf,0x08
0x20,0x7c,0xdf,0x48
0x20,0x7c,0xdf,0x88
0x20,0x7c,0xdf,0xc8
0x20,0x7c,0x9f,0x08
0x20,0x7c,0x9f,0x48
0x20,0x7c,0x9f,0x88
0x20,0x7c,0x9f,0xc8
# CHECK:   ldlarb w0, [x1]
# CHECK:   ldlarh w0, [x1]
# CHECK:   ldlar  w0, [x1]
# CHECK:   ldlar  x0, [x1]
# CHECK:   stllrb w0, [x1]
# CHECK:   stllrh w0, [x1]
# CHECK:   stllr  w0, [x1]
# CHECK:   stllr  x0, [x1]
0x00,0xa4,0x18,0xd5
0x20,0xa4,0x18,0xd5
0x40,0xa4,0x18,0xd5
0x60,0xa4,0x18,0xd5
0xe0,0xa4,0x18,0xd5
# CHECK:   msr LORSA_EL1, x0
# CHECK:   msr LOREA_EL1, x0
# CHECK:   msr LORN_EL1, x0
# CHECK:   msr LORC_EL1, x0
# CHECK:   msr S3_0_C10_C4_7, x0
0x00,0xa4,0x38,0xd5
0x20,0xa4,0x38,0xd5
0x40,0xa4,0x38,0xd5
0x60,0xa4,0x38,0xd5
0xe0,0xa4,0x38,0xd5
# CHECK:   mrs x0, LORSA_EL1
# CHECK:   mrs x0, LOREA_EL1
# CHECK:   mrs x0, LORN_EL1
# CHECK:   mrs x0, LORC_EL1
# CHECK:   mrs x0, LORID_EL1