1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown \
; RUN: -mcpu=pwr9 | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown \
; RUN: -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefix=NO-ALTIVEC
declare i64 @llvm.bswap.i64(i64)
define i64 @bswap64(i64 %x) {
; CHECK-LABEL: bswap64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mtvsrdd 34, 3, 3
; CHECK-NEXT: xxbrd 0, 34
; CHECK-NEXT: mffprd 3, 0
; CHECK-NEXT: blr
;
; NO-ALTIVEC-LABEL: bswap64:
; NO-ALTIVEC: # %bb.0: # %entry
; NO-ALTIVEC-NEXT: rotldi 5, 3, 16
; NO-ALTIVEC-NEXT: rotldi 4, 3, 8
; NO-ALTIVEC-NEXT: rldimi 4, 5, 8, 48
; NO-ALTIVEC-NEXT: rotldi 5, 3, 24
; NO-ALTIVEC-NEXT: rldimi 4, 5, 16, 40
; NO-ALTIVEC-NEXT: rotldi 5, 3, 32
; NO-ALTIVEC-NEXT: rldimi 4, 5, 24, 32
; NO-ALTIVEC-NEXT: rotldi 5, 3, 48
; NO-ALTIVEC-NEXT: rldimi 4, 5, 40, 16
; NO-ALTIVEC-NEXT: rotldi 5, 3, 56
; NO-ALTIVEC-NEXT: rldimi 4, 5, 48, 8
; NO-ALTIVEC-NEXT: rldimi 4, 3, 56, 0
; NO-ALTIVEC-NEXT: mr 3, 4
; NO-ALTIVEC-NEXT: blr
entry:
%0 = call i64 @llvm.bswap.i64(i64 %x)
ret i64 %0
}
|
