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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
define void @test_movi() { ret void }
define void @test_movi16() { ret void }
define void @test_movi32() { ret void }
...
---
name: test_movi
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gprb }
body: |
bb.0:
; CHECK-LABEL: name: test_movi
; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 786444, 14 /* CC::al */, $noreg, $noreg
; CHECK: $r0 = COPY [[t2MOVi]]
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
%0(s32) = G_CONSTANT i32 786444 ; 0x000c000c
$r0 = COPY %0(s32)
BX_RET 14, $noreg, implicit $r0
...
---
name: test_movi16
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gprb }
body: |
bb.0:
; CHECK-LABEL: name: test_movi16
; CHECK: [[t2MOVi16_:%[0-9]+]]:rgpr = t2MOVi16 65533, 14 /* CC::al */, $noreg
; CHECK: $r0 = COPY [[t2MOVi16_]]
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
%0(s32) = G_CONSTANT i32 65533
$r0 = COPY %0(s32)
BX_RET 14, $noreg, implicit $r0
...
---
name: test_movi32
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gprb }
body: |
bb.0:
; CHECK-LABEL: name: test_movi32
; CHECK: [[t2MOVi32imm:%[0-9]+]]:rgpr = t2MOVi32imm 185470479
; CHECK: $r0 = COPY [[t2MOVi32imm]]
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
%0(s32) = G_CONSTANT i32 185470479 ; 0x0b0e0e0f
$r0 = COPY %0(s32)
BX_RET 14, $noreg, implicit $r0
...
|
