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<span id="amdgpu-synid-gfx8-vdst-8"></span><h1>vdst<a class="headerlink" href="#vdst" title="Permalink to this headline">ΒΆ</a></h1>
<p>Image data to load by an image instruction.</p>
<p><em>Size:</em> depends on <a class="reference internal" href="../AMDGPUModifierSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a>, <a class="reference internal" href="../AMDGPUModifierSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> and <a class="reference internal" href="../AMDGPUModifierSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>:</p>
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<li><p><a class="reference internal" href="../AMDGPUModifierSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on <a class="reference internal" href="../AMDGPUModifierSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>.</p></li>
<li><p><a class="reference internal" href="../AMDGPUModifierSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a> has different meaning for GFX8.0 and GFX8.1:</p>
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<li><p>For GFX8.0 this modifier does not affect size of data elements in registers. Data in registers are stored in low 16 bits, high 16 bits are unused. There is no packing.</p></li>
<li><p>Starting from GFX8.1 this modifier specifies that data elements in registers are packed; each value occupies 16 bits.</p></li>
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<li><p><a class="reference internal" href="../AMDGPUModifierSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> adds 1 dword if specified.</p></li>
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<p><em>Operands:</em> <a class="reference internal" href="../AMDGPUOperandSyntax.html#amdgpu-synid-v"><span class="std std-ref">v</span></a></p>
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