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//===-- CSKY.td - Describe the CSKY Target Machine ---------*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
include "llvm/Target/Target.td"
//===----------------------------------------------------------------------===//
// CSKY subtarget features and instruction predicates.
//===----------------------------------------------------------------------===//
def ModeHardFloat :
SubtargetFeature<"hard-float", "UseHardFloat",
"true", "Use hard floating point features">;
def ModeHardFloatABI :
SubtargetFeature<"hard-float-abi", "UseHardFloatABI",
"true", "Use hard floating point ABI to pass args">;
def FeatureFPUV2_SF
: SubtargetFeature<"fpuv2_sf", "HasFPUv2SingleFloat", "true",
"Enable FPUv2 single float instructions">;
def HasFPUv2_SF : Predicate<"Subtarget->hasFPUv2SingleFloat()">,
AssemblerPredicate<(all_of FeatureFPUV2_SF),
"Enable FPUv2 single float instructions">;
def FeatureFPUV2_DF
: SubtargetFeature<"fpuv2_df", "HasFPUv2DoubleFloat", "true",
"Enable FPUv2 double float instructions">;
def HasFPUv2_DF : Predicate<"Subtarget->hasFPUv2DoubleFloat()">,
AssemblerPredicate<(all_of FeatureFPUV2_DF),
"Enable FPUv2 double float instructions">;
def FeatureFPUV3_SF
: SubtargetFeature<"fpuv3_sf", "HasFPUv3SingleFloat", "true",
"Enable FPUv3 single float instructions">;
def HasFPUv3_SF : Predicate<"Subtarget->hasFPUv3SingleFloat()">,
AssemblerPredicate<(all_of FeatureFPUV3_SF),
"Enable FPUv3 single float instructions">;
def FeatureFPUV3_DF
: SubtargetFeature<"fpuv3_df", "HasFPUv3DoubleFloat", "true",
"Enable FPUv3 double float instructions">;
def HasFPUv3_DF : Predicate<"Subtarget->hasFPUv3DoubleFloat()">,
AssemblerPredicate<(all_of FeatureFPUV3_DF),
"Enable FPUv3 double float instructions">;
def FeatureBTST16 : SubtargetFeature<"btst16", "HasBTST16", "true",
"Use the 16-bit btsti instruction">;
def HasBTST16 : Predicate<"Subtarget->hasBTST16()">,
AssemblerPredicate<(all_of FeatureBTST16),
"Use the 16-bit btsti instruction">;
// Atomic Support
def FeatureExtendLrw : SubtargetFeature<"elrw", "HasExtendLrw", "true",
"Use the extend LRW instruction">;
def HasExtendLrw : Predicate<"Subtarget->hasExtendLrw()">,
AssemblerPredicate<(all_of FeatureExtendLrw),
"Use the extend LRW instruction">;
def FeatureJAVA
: SubtargetFeature<"java", "HasJAVA", "true", "Enable java instructions">;
def HasJAVA : Predicate<"Subtarget->hasJAVA()">,
AssemblerPredicate<(all_of FeatureJAVA),
"Enable java instructions">;
def FeatureDoloop : SubtargetFeature<"doloop", "HasDoloop", "true",
"Enable doloop instructions">;
def HasDoloop : Predicate<"Subtarget->hasDoloop()">,
AssemblerPredicate<(all_of FeatureDoloop),
"Enable doloop instructions">;
def HasE1
: SubtargetFeature<"e1", "HasE1", "true", "Support CSKY e1 instructions",
[FeatureExtendLrw]>;
def iHasE1 : Predicate<"Subtarget->hasE1()">,
AssemblerPredicate<(all_of HasE1),
"Support CSKY e1 instructions">;
def HasE2
: SubtargetFeature<"e2", "HasE2", "true", "Support CSKY e2 instructions",
[HasE1]>;
def iHasE2 : Predicate<"Subtarget->hasE2()">,
AssemblerPredicate<(all_of HasE2),
"Support CSKY e2 instructions">;
def Has2E3 : SubtargetFeature<"2e3", "Has2E3", "true",
"Support CSKY 2e3 instructions", [HasE2]>;
def iHas2E3 : Predicate<"Subtarget->has2E3()">,
AssemblerPredicate<(all_of Has2E3),
"Support CSKY 2e3 instructions">;
def Has3E3r1 : SubtargetFeature<"3e3r1", "Has3E3r1", "true",
"Support CSKY 3e3r1 instructions">;
def iHas3E3r1 : Predicate<"Subtarget->has3E3r1()">,
AssemblerPredicate<(all_of Has3E3r1),
"Support CSKY 3e3r1 instructions">;
def Has3r2E3r3
: SubtargetFeature<"3e3r3", "Has3r2E3r3", "true",
"Support CSKY 3e3r3 instructions", [FeatureDoloop]>;
def iHas3r2E3r3 : Predicate<"Subtarget->has3r2E3r3()">,
AssemblerPredicate<(all_of Has3r2E3r3),
"Support CSKY 3e3r3 instructions">;
def Has3E7 : SubtargetFeature<"3e7", "Has3E7", "true",
"Support CSKY 3e7 instructions", [Has2E3]>;
def iHas3E7 : Predicate<"Subtarget->has3E7()">,
AssemblerPredicate<(all_of Has3E7),
"Support CSKY 3e7 instructions">;
def HasMP1E2 : SubtargetFeature<"mp1e2", "HasMP1E2", "true",
"Support CSKY mp1e2 instructions", [Has3E7]>;
def iHasMP1E2 : Predicate<"Subtarget->hasMP1E2()">,
AssemblerPredicate<(all_of HasMP1E2),
"Support CSKY mp1e2 instructions">;
def Has7E10 : SubtargetFeature<"7e10", "Has7E10", "true",
"Support CSKY 7e10 instructions", [Has3E7]>;
def iHas7E10 : Predicate<"Subtarget->has7E10()">,
AssemblerPredicate<(all_of Has7E10),
"Support CSKY 7e10 instructions">;
def Has10E60 : SubtargetFeature<"10e60", "Has10E60", "true",
"Support CSKY 10e60 instructions", [Has7E10]>;
def iHas10E60 : Predicate<"Subtarget->has10E60()">,
AssemblerPredicate<(all_of Has10E60),
"Support CSKY 10e60 instructions">;
//===----------------------------------------------------------------------===//
// Registers, calling conventions, instruction descriptions.
//===----------------------------------------------------------------------===//
include "CSKYRegisterInfo.td"
include "CSKYCallingConv.td"
include "CSKYInstrInfo.td"
//===----------------------------------------------------------------------===//
// CSKY processors supported.
//===----------------------------------------------------------------------===//
def : ProcessorModel<"generic", NoSchedModel, []>;
//===----------------------------------------------------------------------===//
// Define the CSKY target.
//===----------------------------------------------------------------------===//
def CSKYInstrInfo : InstrInfo;
def CSKYAsmParser : AsmParser {
let ShouldEmitMatchRegisterAltName = 1;
let AllowDuplicateRegisterNames = 1;
}
def CSKYAsmWriter : AsmWriter {
int PassSubtarget = 1;
}
def CSKY : Target {
let InstructionSet = CSKYInstrInfo;
let AssemblyParsers = [CSKYAsmParser];
let AssemblyWriters = [CSKYAsmWriter];
let AllowRegisterRenaming = 1;
}
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