1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=arm64-linux-gnu -verify-machineinstrs -mcpu=cyclone | FileCheck %s -check-prefixes=CHECK,NOOUTLINE
; RUN: llc < %s -mtriple=arm64-linux-gnu -verify-machineinstrs -mcpu=cyclone -mattr=+outline-atomics | FileCheck %s -check-prefixes=CHECK,OUTLINE
; RUN: llc < %s -mtriple=arm64-linux-gnu -verify-machineinstrs -mcpu=cyclone -mattr=+lse | FileCheck %s -check-prefixes=CHECK,LSE
@var = global i128 0
define i128 @val_compare_and_swap(i128* %p, i128 %oldval, i128 %newval) {
; NOOUTLINE-LABEL: val_compare_and_swap:
; NOOUTLINE: // %bb.0:
; NOOUTLINE-NEXT: .LBB0_1: // =>This Inner Loop Header: Depth=1
; NOOUTLINE-NEXT: ldaxp x8, x1, [x0]
; NOOUTLINE-NEXT: cmp x8, x2
; NOOUTLINE-NEXT: cset w9, ne
; NOOUTLINE-NEXT: cmp x1, x3
; NOOUTLINE-NEXT: cinc w9, w9, ne
; NOOUTLINE-NEXT: cbz w9, .LBB0_3
; NOOUTLINE-NEXT: // %bb.2: // in Loop: Header=BB0_1 Depth=1
; NOOUTLINE-NEXT: stxp w9, x8, x1, [x0]
; NOOUTLINE-NEXT: cbnz w9, .LBB0_1
; NOOUTLINE-NEXT: b .LBB0_4
; NOOUTLINE-NEXT: .LBB0_3: // in Loop: Header=BB0_1 Depth=1
; NOOUTLINE-NEXT: stxp w9, x4, x5, [x0]
; NOOUTLINE-NEXT: cbnz w9, .LBB0_1
; NOOUTLINE-NEXT: .LBB0_4:
; NOOUTLINE-NEXT: mov x0, x8
; NOOUTLINE-NEXT: ret
;
; OUTLINE-LABEL: val_compare_and_swap:
; OUTLINE: // %bb.0:
; OUTLINE-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-NEXT: .cfi_def_cfa_offset 16
; OUTLINE-NEXT: .cfi_offset w30, -16
; OUTLINE-NEXT: mov x1, x3
; OUTLINE-NEXT: mov x8, x0
; OUTLINE-NEXT: mov x0, x2
; OUTLINE-NEXT: mov x2, x4
; OUTLINE-NEXT: mov x3, x5
; OUTLINE-NEXT: mov x4, x8
; OUTLINE-NEXT: bl __aarch64_cas16_acq
; OUTLINE-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-NEXT: ret
;
; LSE-LABEL: val_compare_and_swap:
; LSE: // %bb.0:
; LSE-NEXT: // kill: def $x5 killed $x5 killed $x4_x5 def $x4_x5
; LSE-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; LSE-NEXT: // kill: def $x4 killed $x4 killed $x4_x5 def $x4_x5
; LSE-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; LSE-NEXT: caspa x2, x3, x4, x5, [x0]
; LSE-NEXT: mov x0, x2
; LSE-NEXT: mov x1, x3
; LSE-NEXT: ret
%pair = cmpxchg i128* %p, i128 %oldval, i128 %newval acquire acquire
%val = extractvalue { i128, i1 } %pair, 0
ret i128 %val
}
define i128 @val_compare_and_swap_seqcst(i128* %p, i128 %oldval, i128 %newval) {
; NOOUTLINE-LABEL: val_compare_and_swap_seqcst:
; NOOUTLINE: // %bb.0:
; NOOUTLINE-NEXT: .LBB1_1: // =>This Inner Loop Header: Depth=1
; NOOUTLINE-NEXT: ldaxp x8, x1, [x0]
; NOOUTLINE-NEXT: cmp x8, x2
; NOOUTLINE-NEXT: cset w9, ne
; NOOUTLINE-NEXT: cmp x1, x3
; NOOUTLINE-NEXT: cinc w9, w9, ne
; NOOUTLINE-NEXT: cbz w9, .LBB1_3
; NOOUTLINE-NEXT: // %bb.2: // in Loop: Header=BB1_1 Depth=1
; NOOUTLINE-NEXT: stlxp w9, x8, x1, [x0]
; NOOUTLINE-NEXT: cbnz w9, .LBB1_1
; NOOUTLINE-NEXT: b .LBB1_4
; NOOUTLINE-NEXT: .LBB1_3: // in Loop: Header=BB1_1 Depth=1
; NOOUTLINE-NEXT: stlxp w9, x4, x5, [x0]
; NOOUTLINE-NEXT: cbnz w9, .LBB1_1
; NOOUTLINE-NEXT: .LBB1_4:
; NOOUTLINE-NEXT: mov x0, x8
; NOOUTLINE-NEXT: ret
;
; OUTLINE-LABEL: val_compare_and_swap_seqcst:
; OUTLINE: // %bb.0:
; OUTLINE-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-NEXT: .cfi_def_cfa_offset 16
; OUTLINE-NEXT: .cfi_offset w30, -16
; OUTLINE-NEXT: mov x1, x3
; OUTLINE-NEXT: mov x8, x0
; OUTLINE-NEXT: mov x0, x2
; OUTLINE-NEXT: mov x2, x4
; OUTLINE-NEXT: mov x3, x5
; OUTLINE-NEXT: mov x4, x8
; OUTLINE-NEXT: bl __aarch64_cas16_acq_rel
; OUTLINE-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-NEXT: ret
;
; LSE-LABEL: val_compare_and_swap_seqcst:
; LSE: // %bb.0:
; LSE-NEXT: // kill: def $x5 killed $x5 killed $x4_x5 def $x4_x5
; LSE-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; LSE-NEXT: // kill: def $x4 killed $x4 killed $x4_x5 def $x4_x5
; LSE-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; LSE-NEXT: caspal x2, x3, x4, x5, [x0]
; LSE-NEXT: mov x0, x2
; LSE-NEXT: mov x1, x3
; LSE-NEXT: ret
%pair = cmpxchg i128* %p, i128 %oldval, i128 %newval seq_cst seq_cst
%val = extractvalue { i128, i1 } %pair, 0
ret i128 %val
}
define i128 @val_compare_and_swap_release(i128* %p, i128 %oldval, i128 %newval) {
; NOOUTLINE-LABEL: val_compare_and_swap_release:
; NOOUTLINE: // %bb.0:
; NOOUTLINE-NEXT: .LBB2_1: // =>This Inner Loop Header: Depth=1
; NOOUTLINE-NEXT: ldxp x8, x1, [x0]
; NOOUTLINE-NEXT: cmp x8, x2
; NOOUTLINE-NEXT: cset w9, ne
; NOOUTLINE-NEXT: cmp x1, x3
; NOOUTLINE-NEXT: cinc w9, w9, ne
; NOOUTLINE-NEXT: cbz w9, .LBB2_3
; NOOUTLINE-NEXT: // %bb.2: // in Loop: Header=BB2_1 Depth=1
; NOOUTLINE-NEXT: stlxp w9, x8, x1, [x0]
; NOOUTLINE-NEXT: cbnz w9, .LBB2_1
; NOOUTLINE-NEXT: b .LBB2_4
; NOOUTLINE-NEXT: .LBB2_3: // in Loop: Header=BB2_1 Depth=1
; NOOUTLINE-NEXT: stlxp w9, x4, x5, [x0]
; NOOUTLINE-NEXT: cbnz w9, .LBB2_1
; NOOUTLINE-NEXT: .LBB2_4:
; NOOUTLINE-NEXT: mov x0, x8
; NOOUTLINE-NEXT: ret
;
; OUTLINE-LABEL: val_compare_and_swap_release:
; OUTLINE: // %bb.0:
; OUTLINE-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-NEXT: .cfi_def_cfa_offset 16
; OUTLINE-NEXT: .cfi_offset w30, -16
; OUTLINE-NEXT: mov x1, x3
; OUTLINE-NEXT: mov x8, x0
; OUTLINE-NEXT: mov x0, x2
; OUTLINE-NEXT: mov x2, x4
; OUTLINE-NEXT: mov x3, x5
; OUTLINE-NEXT: mov x4, x8
; OUTLINE-NEXT: bl __aarch64_cas16_rel
; OUTLINE-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-NEXT: ret
;
; LSE-LABEL: val_compare_and_swap_release:
; LSE: // %bb.0:
; LSE-NEXT: // kill: def $x5 killed $x5 killed $x4_x5 def $x4_x5
; LSE-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; LSE-NEXT: // kill: def $x4 killed $x4 killed $x4_x5 def $x4_x5
; LSE-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; LSE-NEXT: caspl x2, x3, x4, x5, [x0]
; LSE-NEXT: mov x0, x2
; LSE-NEXT: mov x1, x3
; LSE-NEXT: ret
%pair = cmpxchg i128* %p, i128 %oldval, i128 %newval release monotonic
%val = extractvalue { i128, i1 } %pair, 0
ret i128 %val
}
define i128 @val_compare_and_swap_monotonic(i128* %p, i128 %oldval, i128 %newval) {
; NOOUTLINE-LABEL: val_compare_and_swap_monotonic:
; NOOUTLINE: // %bb.0:
; NOOUTLINE-NEXT: .LBB3_1: // =>This Inner Loop Header: Depth=1
; NOOUTLINE-NEXT: ldxp x8, x1, [x0]
; NOOUTLINE-NEXT: cmp x8, x2
; NOOUTLINE-NEXT: cset w9, ne
; NOOUTLINE-NEXT: cmp x1, x3
; NOOUTLINE-NEXT: cinc w9, w9, ne
; NOOUTLINE-NEXT: cbz w9, .LBB3_3
; NOOUTLINE-NEXT: // %bb.2: // in Loop: Header=BB3_1 Depth=1
; NOOUTLINE-NEXT: stxp w9, x8, x1, [x0]
; NOOUTLINE-NEXT: cbnz w9, .LBB3_1
; NOOUTLINE-NEXT: b .LBB3_4
; NOOUTLINE-NEXT: .LBB3_3: // in Loop: Header=BB3_1 Depth=1
; NOOUTLINE-NEXT: stxp w9, x4, x5, [x0]
; NOOUTLINE-NEXT: cbnz w9, .LBB3_1
; NOOUTLINE-NEXT: .LBB3_4:
; NOOUTLINE-NEXT: mov x0, x8
; NOOUTLINE-NEXT: ret
;
; OUTLINE-LABEL: val_compare_and_swap_monotonic:
; OUTLINE: // %bb.0:
; OUTLINE-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-NEXT: .cfi_def_cfa_offset 16
; OUTLINE-NEXT: .cfi_offset w30, -16
; OUTLINE-NEXT: mov x1, x3
; OUTLINE-NEXT: mov x8, x0
; OUTLINE-NEXT: mov x0, x2
; OUTLINE-NEXT: mov x2, x4
; OUTLINE-NEXT: mov x3, x5
; OUTLINE-NEXT: mov x4, x8
; OUTLINE-NEXT: bl __aarch64_cas16_relax
; OUTLINE-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-NEXT: ret
;
; LSE-LABEL: val_compare_and_swap_monotonic:
; LSE: // %bb.0:
; LSE-NEXT: // kill: def $x5 killed $x5 killed $x4_x5 def $x4_x5
; LSE-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; LSE-NEXT: // kill: def $x4 killed $x4 killed $x4_x5 def $x4_x5
; LSE-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; LSE-NEXT: casp x2, x3, x4, x5, [x0]
; LSE-NEXT: mov x0, x2
; LSE-NEXT: mov x1, x3
; LSE-NEXT: ret
%pair = cmpxchg i128* %p, i128 %oldval, i128 %newval monotonic monotonic
%val = extractvalue { i128, i1 } %pair, 0
ret i128 %val
}
define void @fetch_and_nand(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_nand:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB4_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldxp x9, x8, [x0]
; CHECK-NEXT: and x10, x9, x2
; CHECK-NEXT: and x11, x8, x3
; CHECK-NEXT: mvn x11, x11
; CHECK-NEXT: mvn x10, x10
; CHECK-NEXT: stlxp w12, x10, x11, [x0]
; CHECK-NEXT: cbnz w12, .LBB4_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: adrp x10, :got:var
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var]
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%val = atomicrmw nand i128* %p, i128 %bits release
store i128 %val, i128* @var, align 16
ret void
}
define void @fetch_and_or(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_or:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB5_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp x9, x8, [x0]
; CHECK-NEXT: orr x10, x8, x3
; CHECK-NEXT: orr x11, x9, x2
; CHECK-NEXT: stlxp w12, x11, x10, [x0]
; CHECK-NEXT: cbnz w12, .LBB5_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: adrp x10, :got:var
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var]
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%val = atomicrmw or i128* %p, i128 %bits seq_cst
store i128 %val, i128* @var, align 16
ret void
}
define void @fetch_and_add(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_add:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB6_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp x9, x8, [x0]
; CHECK-NEXT: adds x10, x9, x2
; CHECK-NEXT: adcs x11, x8, x3
; CHECK-NEXT: stlxp w12, x10, x11, [x0]
; CHECK-NEXT: cbnz w12, .LBB6_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: adrp x10, :got:var
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var]
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%val = atomicrmw add i128* %p, i128 %bits seq_cst
store i128 %val, i128* @var, align 16
ret void
}
define void @fetch_and_sub(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_sub:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB7_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp x9, x8, [x0]
; CHECK-NEXT: subs x10, x9, x2
; CHECK-NEXT: sbcs x11, x8, x3
; CHECK-NEXT: stlxp w12, x10, x11, [x0]
; CHECK-NEXT: cbnz w12, .LBB7_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: adrp x10, :got:var
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var]
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%val = atomicrmw sub i128* %p, i128 %bits seq_cst
store i128 %val, i128* @var, align 16
ret void
}
define void @fetch_and_min(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_min:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB8_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp x9, x8, [x0]
; CHECK-NEXT: cmp x9, x2
; CHECK-NEXT: cset w10, ls
; CHECK-NEXT: cmp x8, x3
; CHECK-NEXT: cset w11, le
; CHECK-NEXT: csel w10, w10, w11, eq
; CHECK-NEXT: cmp w10, #0
; CHECK-NEXT: csel x10, x8, x3, ne
; CHECK-NEXT: csel x11, x9, x2, ne
; CHECK-NEXT: stlxp w12, x11, x10, [x0]
; CHECK-NEXT: cbnz w12, .LBB8_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: adrp x10, :got:var
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var]
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%val = atomicrmw min i128* %p, i128 %bits seq_cst
store i128 %val, i128* @var, align 16
ret void
}
define void @fetch_and_max(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_max:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB9_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp x9, x8, [x0]
; CHECK-NEXT: cmp x9, x2
; CHECK-NEXT: cset w10, hi
; CHECK-NEXT: cmp x8, x3
; CHECK-NEXT: cset w11, gt
; CHECK-NEXT: csel w10, w10, w11, eq
; CHECK-NEXT: cmp w10, #0
; CHECK-NEXT: csel x10, x8, x3, ne
; CHECK-NEXT: csel x11, x9, x2, ne
; CHECK-NEXT: stlxp w12, x11, x10, [x0]
; CHECK-NEXT: cbnz w12, .LBB9_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: adrp x10, :got:var
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var]
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%val = atomicrmw max i128* %p, i128 %bits seq_cst
store i128 %val, i128* @var, align 16
ret void
}
define void @fetch_and_umin(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_umin:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB10_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp x9, x8, [x0]
; CHECK-NEXT: cmp x9, x2
; CHECK-NEXT: cset w10, ls
; CHECK-NEXT: cmp x8, x3
; CHECK-NEXT: cset w11, ls
; CHECK-NEXT: csel w10, w10, w11, eq
; CHECK-NEXT: cmp w10, #0
; CHECK-NEXT: csel x10, x8, x3, ne
; CHECK-NEXT: csel x11, x9, x2, ne
; CHECK-NEXT: stlxp w12, x11, x10, [x0]
; CHECK-NEXT: cbnz w12, .LBB10_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: adrp x10, :got:var
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var]
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%val = atomicrmw umin i128* %p, i128 %bits seq_cst
store i128 %val, i128* @var, align 16
ret void
}
define void @fetch_and_umax(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_umax:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB11_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp x9, x8, [x0]
; CHECK-NEXT: cmp x9, x2
; CHECK-NEXT: cset w10, hi
; CHECK-NEXT: cmp x8, x3
; CHECK-NEXT: cset w11, hi
; CHECK-NEXT: csel w10, w10, w11, eq
; CHECK-NEXT: cmp w10, #0
; CHECK-NEXT: csel x10, x8, x3, ne
; CHECK-NEXT: csel x11, x9, x2, ne
; CHECK-NEXT: stlxp w12, x11, x10, [x0]
; CHECK-NEXT: cbnz w12, .LBB11_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: adrp x10, :got:var
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var]
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%val = atomicrmw umax i128* %p, i128 %bits seq_cst
store i128 %val, i128* @var, align 16
ret void
}
define i128 @atomic_load_seq_cst(i128* %p) {
; CHECK-LABEL: atomic_load_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: .LBB12_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp x0, x1, [x8]
; CHECK-NEXT: stlxp w9, x0, x1, [x8]
; CHECK-NEXT: cbnz w9, .LBB12_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: ret
%r = load atomic i128, i128* %p seq_cst, align 16
ret i128 %r
}
define i128 @atomic_load_relaxed(i64, i64, i128* %p) {
; CHECK-LABEL: atomic_load_relaxed:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB13_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldxp x0, x1, [x2]
; CHECK-NEXT: stxp w8, x0, x1, [x2]
; CHECK-NEXT: cbnz w8, .LBB13_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: ret
%r = load atomic i128, i128* %p monotonic, align 16
ret i128 %r
}
define void @atomic_store_seq_cst(i128 %in, i128* %p) {
; CHECK-LABEL: atomic_store_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB14_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldaxp xzr, x8, [x2]
; CHECK-NEXT: stlxp w8, x0, x1, [x2]
; CHECK-NEXT: cbnz w8, .LBB14_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: ret
store atomic i128 %in, i128* %p seq_cst, align 16
ret void
}
define void @atomic_store_release(i128 %in, i128* %p) {
; CHECK-LABEL: atomic_store_release:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB15_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldxp xzr, x8, [x2]
; CHECK-NEXT: stlxp w8, x0, x1, [x2]
; CHECK-NEXT: cbnz w8, .LBB15_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: ret
store atomic i128 %in, i128* %p release, align 16
ret void
}
define void @atomic_store_relaxed(i128 %in, i128* %p) {
; CHECK-LABEL: atomic_store_relaxed:
; CHECK: // %bb.0:
; CHECK-NEXT: .LBB16_1: // %atomicrmw.start
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldxp xzr, x8, [x2]
; CHECK-NEXT: stxp w8, x0, x1, [x2]
; CHECK-NEXT: cbnz w8, .LBB16_1
; CHECK-NEXT: // %bb.2: // %atomicrmw.end
; CHECK-NEXT: ret
store atomic i128 %in, i128* %p unordered, align 16
ret void
}
|
