File: arm64-coalesce-ext.ll

package info (click to toggle)
llvm-toolchain-14 1%3A14.0.6-12
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 1,496,180 kB
  • sloc: cpp: 5,593,972; ansic: 986,872; asm: 585,869; python: 184,223; objc: 72,530; lisp: 31,119; f90: 27,793; javascript: 9,780; pascal: 9,762; sh: 9,482; perl: 7,468; ml: 5,432; awk: 3,523; makefile: 2,538; xml: 953; cs: 573; fortran: 567
file content (17 lines) | stat: -rw-r--r-- 600 bytes parent folder | download | duplicates (16) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
 
; RUN: llc -mtriple=arm64-apple-darwin < %s | FileCheck %s
; Check that the peephole optimizer knows about sext and zext instructions.
; CHECK: test1sext
define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
  %C = add i64 %A, %B
  ; CHECK: add x[[SUM:[0-9]+]], x0, x1
  %D = trunc i64 %C to i32
  %E = shl i64 %C, 32
  %F = ashr i64 %E, 32
  ; CHECK: sxtw x[[EXT:[0-9]+]], w[[SUM]]
  store volatile i64 %F, i64 *%P2
  ; CHECK: str x[[EXT]]
  store volatile i32 %D, i32* %P
  ; Reuse low bits of extended register, don't extend live range of SUM.
  ; CHECK: str w[[SUM]]
  ret i32 %D
}