File: csr-sgpr-spill-live-ins.mir

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llvm-toolchain-14 1%3A14.0.6-12
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx906 -run-pass=si-lower-sgpr-spills,prologepilog -o - %s | FileCheck %s

# Make sure the modified CSR VGPRs are added as live-in to the entry
# block.

---
name: def_csr_sgpr
tracksRegLiveness: true
machineFunctionInfo:
  scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
  stackPtrOffsetReg: $sgpr32
body: |
  ; CHECK-LABEL: name: def_csr_sgpr
  ; CHECK: bb.0:
  ; CHECK:   successors: %bb.1(0x80000000)
  ; CHECK:   liveins: $sgpr42, $sgpr43, $sgpr46, $sgpr47, $vgpr0
  ; CHECK:   $vgpr0 = V_WRITELANE_B32 killed $sgpr42, 0, $vgpr0
  ; CHECK:   $vgpr0 = V_WRITELANE_B32 killed $sgpr43, 1, $vgpr0
  ; CHECK:   $vgpr0 = V_WRITELANE_B32 killed $sgpr46, 2, $vgpr0
  ; CHECK:   $vgpr0 = V_WRITELANE_B32 killed $sgpr47, 3, $vgpr0
  ; CHECK:   S_NOP 0
  ; CHECK: bb.1:
  ; CHECK:   liveins: $vgpr0
  ; CHECK:   $sgpr42 = S_MOV_B32 0
  ; CHECK:   $sgpr43 = S_MOV_B32 1
  ; CHECK:   $sgpr46_sgpr47 = S_MOV_B64 2
  bb.0:
    S_NOP 0

  bb.1:
    $sgpr42 = S_MOV_B32 0
    $sgpr43 = S_MOV_B32 1
    $sgpr46_sgpr47 = S_MOV_B64 2
...