1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
|
; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
; GCN-LABEL: name: uniform_trunc_i16_to_i1
; GCN: S_AND_B32 1
; GCN: S_CMP_EQ_U32
define amdgpu_kernel void @uniform_trunc_i16_to_i1(i1 addrspace(1)* %out, i16 %x, i1 %z) {
%setcc = icmp slt i16 %x, 0
%select = select i1 %setcc, i1 true, i1 %z
store i1 %select, i1 addrspace(1)* %out
ret void
}
; GCN-LABEL: name: divergent_trunc_i16_to_i1
; GCN: V_AND_B32_e64 1
; GCN: V_CMP_EQ_U32_e64
define i1 @divergent_trunc_i16_to_i1(i1 addrspace(1)* %out, i16 %x, i1 %z) {
%setcc = icmp slt i16 %x, 0
%select = select i1 %setcc, i1 true, i1 %z
ret i1 %select
}
; GCN-LABEL: name: uniform_trunc_i32_to_i1
; GCN: S_AND_B32 1
; GCN: S_CMP_EQ_U32
define amdgpu_kernel void @uniform_trunc_i32_to_i1(i1 addrspace(1)* %out, i32 %x, i1 %z) {
%setcc = icmp slt i32 %x, 0
%select = select i1 %setcc, i1 true, i1 %z
store i1 %select, i1 addrspace(1)* %out
ret void
}
; GCN-LABEL: name: divergent_trunc_i32_to_i1
; GCN: V_AND_B32_e64 1
; GCN: V_CMP_EQ_U32_e64
define i1 @divergent_trunc_i32_to_i1(i1 addrspace(1)* %out, i32 %x, i1 %z) {
%setcc = icmp slt i32 %x, 0
%select = select i1 %setcc, i1 true, i1 %z
ret i1 %select
}
; GCN-LABEL: name: uniform_trunc_i64_to_i1
; GCN: S_AND_B32 1
; GCN: S_CMP_EQ_U32
define amdgpu_kernel void @uniform_trunc_i64_to_i1(i1 addrspace(1)* %out, i64 %x, i1 %z) {
%setcc = icmp slt i64 %x, 0
%select = select i1 %setcc, i1 true, i1 %z
store i1 %select, i1 addrspace(1)* %out
ret void
}
; GCN-LABEL: name: divergent_trunc_i64_to_i1
; GCN: V_AND_B32_e64 1
; GCN: V_CMP_EQ_U32_e64
define i1 @divergent_trunc_i64_to_i1(i1 addrspace(1)* %out, i64 %x, i1 %z) {
%setcc = icmp slt i64 %x, 0
%select = select i1 %setcc, i1 true, i1 %z
ret i1 %select
}
|
