1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
|
; RUN: llc -mtriple armv6-apple-darwin -filetype asm -o - %s | FileCheck %s
define i32 @test1(i32 %x) {
; CHECK-LABEL: test1:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0
; CHECK-NEXT: bx lr
%tmp1 = and i32 %x, 16711935
ret i32 %tmp1
}
define i32 @test2(i32 %x) {
; CHECK-LABEL: test2:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0, ror #8
; CHECK-NEXT: bx lr
%tmp1 = lshr i32 %x, 8
%tmp2 = and i32 %tmp1, 16711935
ret i32 %tmp2
}
define i32 @test3(i32 %x) {
; CHECK-LABEL: test3:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0, ror #8
; CHECK-NEXT: bx lr
%tmp1 = lshr i32 %x, 8
%tmp2 = and i32 %tmp1, 16711935
ret i32 %tmp2
}
define i32 @test4(i32 %x) {
; CHECK-LABEL: test4:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0, ror #8
; CHECK-NEXT: bx lr
%tmp1 = lshr i32 %x, 8
%tmp6 = and i32 %tmp1, 16711935
ret i32 %tmp6
}
define i32 @test5(i32 %x) {
; CHECK-LABEL: test5:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0, ror #8
; CHECK-NEXT: bx lr
%tmp1 = lshr i32 %x, 8
%tmp2 = and i32 %tmp1, 16711935
ret i32 %tmp2
}
define i32 @test6(i32 %x) {
; CHECK-LABEL: test6:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0, ror #16
; CHECK-NEXT: bx lr
%tmp1 = lshr i32 %x, 16
%tmp2 = and i32 %tmp1, 255
%tmp4 = shl i32 %x, 16
%tmp5 = and i32 %tmp4, 16711680
%tmp6 = or i32 %tmp2, %tmp5
ret i32 %tmp6
}
define i32 @test7(i32 %x) {
; CHECK-LABEL: test7:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0, ror #16
; CHECK-NEXT: bx lr
%tmp1 = lshr i32 %x, 16
%tmp2 = and i32 %tmp1, 255
%tmp4 = shl i32 %x, 16
%tmp5 = and i32 %tmp4, 16711680
%tmp6 = or i32 %tmp2, %tmp5
ret i32 %tmp6
}
define i32 @test8(i32 %x) {
; CHECK-LABEL: test8:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0, ror #24
; CHECK-NEXT: bx lr
%tmp1 = shl i32 %x, 8
%tmp2 = and i32 %tmp1, 16711680
%tmp5 = lshr i32 %x, 24
%tmp6 = or i32 %tmp2, %tmp5
ret i32 %tmp6
}
define i32 @test9(i32 %x) {
; CHECK-LABEL: test9:
; CHECK: @ %bb.0:
; CHECK-NEXT: uxtb16 r0, r0, ror #24
; CHECK-NEXT: bx lr
%tmp1 = lshr i32 %x, 24
%tmp4 = shl i32 %x, 8
%tmp5 = and i32 %tmp4, 16711680
%tmp6 = or i32 %tmp5, %tmp1
ret i32 %tmp6
}
define i32 @test10(i32 %p0) {
; CHECK-LABEL: test10:
; CHECK: @ %bb.0:
; CHECK-NEXT: mov r1, #248
; CHECK-NEXT: orr r1, r1, #16252928
; CHECK-NEXT: and r0, r1, r0, lsr #7
; CHECK-NEXT: lsr r1, r0, #5
; CHECK-NEXT: uxtb16 r1, r1
; CHECK-NEXT: orr r0, r1, r0
; CHECK-NEXT: bx lr
%tmp1 = lshr i32 %p0, 7
%tmp2 = and i32 %tmp1, 16253176
%tmp4 = lshr i32 %tmp2, 5
%tmp5 = and i32 %tmp4, 458759
%tmp7 = or i32 %tmp5, %tmp2
ret i32 %tmp7
}
|
