1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le -ppc-asm-full-reg-names \
; RUN: < %s | FileCheck %s
define i64 @julia_div_i64(i64 %0, i64 %1) local_unnamed_addr #0 {
; CHECK-LABEL: julia_div_i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: divd r6, r3, r4
; CHECK-NEXT: lis r5, -1592
; CHECK-NEXT: ori r7, r5, 21321
; CHECK-NEXT: ori r5, r5, 65519
; CHECK-NEXT: cmpdi r3, 0
; CHECK-NEXT: rldic r7, r7, 4, 17
; CHECK-NEXT: rldic r5, r5, 4, 17
; CHECK-NEXT: iselgt r9, r5, r7
; CHECK-NEXT: cmpdi r4, 0
; CHECK-NEXT: mulld r8, r6, r4
; CHECK-NEXT: iselgt r4, r5, r7
; CHECK-NEXT: xor r4, r9, r4
; CHECK-NEXT: cntlzd r4, r4
; CHECK-NEXT: rldicl r4, r4, 58, 63
; CHECK-NEXT: xor r3, r8, r3
; CHECK-NEXT: addic r5, r3, -1
; CHECK-NEXT: subfe r3, r5, r3
; CHECK-NEXT: and r3, r4, r3
; CHECK-NEXT: add r3, r6, r3
; CHECK-NEXT: blr
entry:
%2 = sdiv i64 %0, %1
%3 = icmp sgt i64 %0, 0
%4 = icmp sgt i64 %1, 0
%5 = select i1 %3, i64 140735820070640, i64 140735819363472
%6 = select i1 %4, i64 140735820070640, i64 140735819363472
%7 = icmp eq i64 %5, %6
%8 = mul i64 %2, %1
%9 = icmp ne i64 %8, %0
%10 = and i1 %7, %9
%11 = zext i1 %10 to i64
%12 = add i64 %2, %11
ret i64 %12
}
|
