File: rv64zksed-intrinsic.ll

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llvm-toolchain-14 1%3A14.0.6-12
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -mattr=+zksed -verify-machineinstrs < %s \
; RUN:   | FileCheck %s -check-prefix=RV64ZKSED

declare i64 @llvm.riscv.sm4ks.i64(i64, i64, i8);

define i64 @sm4ks_i64(i64 %a, i64 %b) nounwind {
; RV64ZKSED-LABEL: sm4ks_i64:
; RV64ZKSED:       # %bb.0:
; RV64ZKSED-NEXT:    sm4ks a0, a0, a1, 0
; RV64ZKSED-NEXT:    ret
  %val = call i64 @llvm.riscv.sm4ks.i64(i64 %a, i64 %b, i8 0)
  ret i64 %val
}

declare i64 @llvm.riscv.sm4ed.i64(i64, i64, i8);

define i64 @sm4ed_i64(i64 %a, i64 %b) nounwind {
; RV64ZKSED-LABEL: sm4ed_i64:
; RV64ZKSED:       # %bb.0:
; RV64ZKSED-NEXT:    sm4ed a0, a0, a1, 1
; RV64ZKSED-NEXT:    ret
  %val = call i64 @llvm.riscv.sm4ed.i64(i64 %a, i64 %b, i8 1)
  ret i64 %val
}