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|
; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
;;; Test vector floating compare and select minimum intrinsic instructions
;;;
;;; Note:
;;; We test VFRMIN*vl and VFRMIN*vl_v instructions.
; Function Attrs: nounwind readnone
define fastcc <256 x double> @vfrmindfst_vvl(<256 x double> %0) {
; CHECK-LABEL: vfrmindfst_vvl:
; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 256
; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfrmin.d.fst %v0, %v0
; CHECK-NEXT: b.l.t (, %s10)
%2 = tail call fast <256 x double> @llvm.ve.vl.vfrmindfst.vvl(<256 x double> %0, i32 256)
ret <256 x double> %2
}
; Function Attrs: nounwind readnone
declare <256 x double> @llvm.ve.vl.vfrmindfst.vvl(<256 x double>, i32)
; Function Attrs: nounwind readnone
define fastcc <256 x double> @vfrmindfst_vvvl(<256 x double> %0, <256 x double> %1) {
; CHECK-LABEL: vfrmindfst_vvvl:
; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 128
; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfrmin.d.fst %v1, %v0
; CHECK-NEXT: lea %s16, 256
; CHECK-NEXT: lvl %s16
; CHECK-NEXT: vor %v0, (0)1, %v1
; CHECK-NEXT: b.l.t (, %s10)
%3 = tail call fast <256 x double> @llvm.ve.vl.vfrmindfst.vvvl(<256 x double> %0, <256 x double> %1, i32 128)
ret <256 x double> %3
}
; Function Attrs: nounwind readnone
declare <256 x double> @llvm.ve.vl.vfrmindfst.vvvl(<256 x double>, <256 x double>, i32)
; Function Attrs: nounwind readnone
define fastcc <256 x double> @vfrmindlst_vvl(<256 x double> %0) {
; CHECK-LABEL: vfrmindlst_vvl:
; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 256
; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfrmin.d.lst %v0, %v0
; CHECK-NEXT: b.l.t (, %s10)
%2 = tail call fast <256 x double> @llvm.ve.vl.vfrmindlst.vvl(<256 x double> %0, i32 256)
ret <256 x double> %2
}
; Function Attrs: nounwind readnone
declare <256 x double> @llvm.ve.vl.vfrmindlst.vvl(<256 x double>, i32)
; Function Attrs: nounwind readnone
define fastcc <256 x double> @vfrmindlst_vvvl(<256 x double> %0, <256 x double> %1) {
; CHECK-LABEL: vfrmindlst_vvvl:
; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 128
; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfrmin.d.lst %v1, %v0
; CHECK-NEXT: lea %s16, 256
; CHECK-NEXT: lvl %s16
; CHECK-NEXT: vor %v0, (0)1, %v1
; CHECK-NEXT: b.l.t (, %s10)
%3 = tail call fast <256 x double> @llvm.ve.vl.vfrmindlst.vvvl(<256 x double> %0, <256 x double> %1, i32 128)
ret <256 x double> %3
}
; Function Attrs: nounwind readnone
declare <256 x double> @llvm.ve.vl.vfrmindlst.vvvl(<256 x double>, <256 x double>, i32)
; Function Attrs: nounwind readnone
define fastcc <256 x double> @vfrminsfst_vvl(<256 x double> %0) {
; CHECK-LABEL: vfrminsfst_vvl:
; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 256
; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfrmin.s.fst %v0, %v0
; CHECK-NEXT: b.l.t (, %s10)
%2 = tail call fast <256 x double> @llvm.ve.vl.vfrminsfst.vvl(<256 x double> %0, i32 256)
ret <256 x double> %2
}
; Function Attrs: nounwind readnone
declare <256 x double> @llvm.ve.vl.vfrminsfst.vvl(<256 x double>, i32)
; Function Attrs: nounwind readnone
define fastcc <256 x double> @vfrminsfst_vvvl(<256 x double> %0, <256 x double> %1) {
; CHECK-LABEL: vfrminsfst_vvvl:
; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 128
; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfrmin.s.fst %v1, %v0
; CHECK-NEXT: lea %s16, 256
; CHECK-NEXT: lvl %s16
; CHECK-NEXT: vor %v0, (0)1, %v1
; CHECK-NEXT: b.l.t (, %s10)
%3 = tail call fast <256 x double> @llvm.ve.vl.vfrminsfst.vvvl(<256 x double> %0, <256 x double> %1, i32 128)
ret <256 x double> %3
}
; Function Attrs: nounwind readnone
declare <256 x double> @llvm.ve.vl.vfrminsfst.vvvl(<256 x double>, <256 x double>, i32)
; Function Attrs: nounwind readnone
define fastcc <256 x double> @vfrminslst_vvl(<256 x double> %0) {
; CHECK-LABEL: vfrminslst_vvl:
; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 256
; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfrmin.s.lst %v0, %v0
; CHECK-NEXT: b.l.t (, %s10)
%2 = tail call fast <256 x double> @llvm.ve.vl.vfrminslst.vvl(<256 x double> %0, i32 256)
ret <256 x double> %2
}
; Function Attrs: nounwind readnone
declare <256 x double> @llvm.ve.vl.vfrminslst.vvl(<256 x double>, i32)
; Function Attrs: nounwind readnone
define fastcc <256 x double> @vfrminslst_vvvl(<256 x double> %0, <256 x double> %1) {
; CHECK-LABEL: vfrminslst_vvvl:
; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 128
; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfrmin.s.lst %v1, %v0
; CHECK-NEXT: lea %s16, 256
; CHECK-NEXT: lvl %s16
; CHECK-NEXT: vor %v0, (0)1, %v1
; CHECK-NEXT: b.l.t (, %s10)
%3 = tail call fast <256 x double> @llvm.ve.vl.vfrminslst.vvvl(<256 x double> %0, <256 x double> %1, i32 128)
ret <256 x double> %3
}
; Function Attrs: nounwind readnone
declare <256 x double> @llvm.ve.vl.vfrminslst.vvvl(<256 x double>, <256 x double>, i32)
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