1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+invpcid | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+invpcid | FileCheck %s --check-prefix=X86_64
define void @test_invpcid(i32 %type, i8* %descriptor) {
; X86-LABEL: test_invpcid:
; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: invpcid (%eax), %ecx
; X86-NEXT: retl
;
; X86_64-LABEL: test_invpcid:
; X86_64: # %bb.0: # %entry
; X86_64-NEXT: movl %edi, %eax
; X86_64-NEXT: invpcid (%rsi), %rax
; X86_64-NEXT: retq
entry:
call void @llvm.x86.invpcid(i32 %type, i8* %descriptor)
ret void
}
define void @test_invpcid2(i32* readonly %type, i8* %descriptor) {
; X86-LABEL: test_invpcid2:
; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %ecx
; X86-NEXT: invpcid (%eax), %ecx
; X86-NEXT: retl
;
; X86_64-LABEL: test_invpcid2:
; X86_64: # %bb.0: # %entry
; X86_64-NEXT: movl (%rdi), %eax
; X86_64-NEXT: invpcid (%rsi), %rax
; X86_64-NEXT: retq
entry:
%0 = load i32, i32* %type, align 4
tail call void @llvm.x86.invpcid(i32 %0, i8* %descriptor) #1
ret void
}
declare void @llvm.x86.invpcid(i32, i8*)
|
