1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
|
; Three variants of "MSVC" environments.
; RUN: llc < %s -mattr=sse2 -mattr=avx | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse2 -mattr=avx | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-windows-msvc -mattr=sse2 -mattr=avx | FileCheck %s
; GNU environment.
; RUN: llc < %s -mtriple=x86_64-win32-gnu -mattr=sse2 -mattr=avx | FileCheck -check-prefix=MINGW %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-win32"
define double @double() {
ret double 0x0000000000800000
}
; CHECK: .globl __real@0000000000800000
; CHECK-NEXT: .section .rdata,"dr",discard,__real@0000000000800000
; CHECK-NEXT: .p2align 3
; CHECK-NEXT: __real@0000000000800000:
; CHECK-NEXT: .quad 0x0000000000800000
; CHECK: double:
; CHECK: movsd __real@0000000000800000(%rip), %xmm0
; CHECK-NEXT: ret
; MINGW: .section .rdata,"dr"
; MINGW-NEXT: .p2align 3
; MINGW-NEXT: [[LABEL:\.LC.*]]:
; MINGW-NEXT: .quad 0x0000000000800000
; MINGW: double:
; MINGW: movsd [[LABEL]](%rip), %xmm0
; MINGW-NEXT: ret
define <4 x i32> @vec1() {
ret <4 x i32> <i32 3, i32 2, i32 1, i32 0>
}
; CHECK: .globl __xmm@00000000000000010000000200000003
; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000000000000010000000200000003
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: __xmm@00000000000000010000000200000003:
; CHECK-NEXT: .long 3
; CHECK-NEXT: .long 2
; CHECK-NEXT: .long 1
; CHECK-NEXT: .long 0
; CHECK: vec1:
; CHECK: movaps __xmm@00000000000000010000000200000003(%rip), %xmm0
; CHECK-NEXT: ret
define <8 x i16> @vec2() {
ret <8 x i16> <i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>
}
; CHECK: .globl __xmm@00000001000200030004000500060007
; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000001000200030004000500060007
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: __xmm@00000001000200030004000500060007:
; CHECK-NEXT: .short 7
; CHECK-NEXT: .short 6
; CHECK-NEXT: .short 5
; CHECK-NEXT: .short 4
; CHECK-NEXT: .short 3
; CHECK-NEXT: .short 2
; CHECK-NEXT: .short 1
; CHECK-NEXT: .short 0
; CHECK: vec2:
; CHECK: movaps __xmm@00000001000200030004000500060007(%rip), %xmm0
; CHECK-NEXT: ret
define <4 x float> @undef1() {
ret <4 x float> <float 1.0, float 1.0, float undef, float undef>
; CHECK: .globl __xmm@00000000000000003f8000003f800000
; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000000000000003f8000003f800000
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: __xmm@00000000000000003f8000003f800000:
; CHECK-NEXT: .long 0x3f800000 # float 1
; CHECK-NEXT: .long 0x3f800000 # float 1
; CHECK-NEXT: .zero 4
; CHECK-NEXT: .zero 4
; CHECK: undef1:
; CHECK: movaps __xmm@00000000000000003f8000003f800000(%rip), %xmm0
; CHECK-NEXT: ret
}
define float @pr23966(i32 %a) {
%tobool = icmp ne i32 %a, 0
%sel = select i1 %tobool, float -1.000000e+00, float 1.000000e+00
ret float %sel
}
; CHECK: .globl __real@bf8000003f800000
; CHECK-NEXT: .section .rdata,"dr",discard,__real@bf8000003f800000
; CHECK-NEXT: .p2align 3
; CHECK-NEXT: __real@bf8000003f800000:
; CHECK-NEXT: .long 0x3f800000
; CHECK-NEXT: .long 0xbf800000
define <4 x i64> @ymm() {
entry:
ret <4 x i64> <i64 8589934593, i64 17179869187, i64 8589934593, i64 17179869187>
}
; CHECK: .globl __ymm@0000000400000003000000020000000100000004000000030000000200000001
; CHECK: .section .rdata,"dr",discard,__ymm@0000000400000003000000020000000100000004000000030000000200000001
; CHECK: .p2align 5
; CHECK: __ymm@0000000400000003000000020000000100000004000000030000000200000001:
; CHECK: .quad 8589934593 # 0x200000001
; CHECK: .quad 17179869187 # 0x400000003
; CHECK: .quad 8589934593 # 0x200000001
; CHECK: .quad 17179869187
|
