1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278
|
; RUN: opt < %s -dfsan -S | FileCheck %s
; RUN: opt < %s -dfsan -dfsan-track-origins=1 -S | FileCheck %s --check-prefixes=CHECK,CHECK_ORIGIN
; RUN: opt < %s -dfsan -dfsan-track-origins=1 -dfsan-instrument-with-call-threshold=0 -S | FileCheck %s --check-prefixes=CHECK,CHECK_ORIGIN
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_arg_tls = external thread_local(initialexec) global [[TLS_ARR:\[100 x i64\]]]
; CHECK: @__dfsan_retval_tls = external thread_local(initialexec) global [[TLS_ARR]]
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define i32 @AtomicRmwXchg(i32* %p, i32 %x) {
entry:
; COMM: atomicrmw xchg: store clean shadow/origin, return clean shadow/origin
; CHECK-LABEL: @AtomicRmwXchg.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK-NEXT: atomicrmw xchg i32* %p, i32 %x seq_cst
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32
%0 = atomicrmw xchg i32* %p, i32 %x seq_cst
ret i32 %0
}
define i32 @AtomicRmwMax(i32* %p, i32 %x) {
; COMM: atomicrmw max: exactly the same as above
; CHECK-LABEL: @AtomicRmwMax.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK-NEXT: atomicrmw max i32* %p, i32 %x seq_cst
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32
entry:
%0 = atomicrmw max i32* %p, i32 %x seq_cst
ret i32 %0
}
define i32 @Cmpxchg(i32* %p, i32 %a, i32 %b) {
; COMM: cmpxchg: store clean shadow/origin, return clean shadow/origin
; CHECK-LABEL: @Cmpxchg.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK-NEXT: %pair = cmpxchg i32* %p, i32 %a, i32 %b seq_cst seq_cst
; CHECK: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32
entry:
%pair = cmpxchg i32* %p, i32 %a, i32 %b seq_cst seq_cst
%0 = extractvalue { i32, i1 } %pair, 0
ret i32 %0
}
define i32 @CmpxchgMonotonic(i32* %p, i32 %a, i32 %b) {
; COMM: relaxed cmpxchg: bump up to "release monotonic"
; CHECK-LABEL: @CmpxchgMonotonic.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK-NEXT: %pair = cmpxchg i32* %p, i32 %a, i32 %b release monotonic
; CHECK: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32
entry:
%pair = cmpxchg i32* %p, i32 %a, i32 %b monotonic monotonic
%0 = extractvalue { i32, i1 } %pair, 0
ret i32 %0
}
define i32 @AtomicLoad(i32* %p) {
; COMM: atomic load: load shadow value after app value
; CHECK-LABEL: @AtomicLoad.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: %a = load atomic i32, i32* %p seq_cst, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %a
entry:
%a = load atomic i32, i32* %p seq_cst, align 16
ret i32 %a
}
define i32 @AtomicLoadAcquire(i32* %p) {
; COMM: atomic load: load shadow value after app value
; CHECK-LABEL: @AtomicLoadAcquire.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: %a = load atomic i32, i32* %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %a
entry:
%a = load atomic i32, i32* %p acquire, align 16
ret i32 %a
}
define i32 @AtomicLoadMonotonic(i32* %p) {
; COMM: atomic load monotonic: bump up to load acquire
; CHECK-LABEL: @AtomicLoadMonotonic.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: %a = load atomic i32, i32* %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %a
entry:
%a = load atomic i32, i32* %p monotonic, align 16
ret i32 %a
}
define i32 @AtomicLoadUnordered(i32* %p) {
; COMM: atomic load unordered: bump up to load acquire
; CHECK-LABEL: @AtomicLoadUnordered.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: %a = load atomic i32, i32* %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %a
entry:
%a = load atomic i32, i32* %p unordered, align 16
ret i32 %a
}
define void @AtomicStore(i32* %p, i32 %x) {
; COMM: atomic store: store clean shadow value before app value
; CHECK-LABEL: @AtomicStore.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK_ORIGIN-NOT: 35184372088832
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, i32* %p seq_cst, align 16
; CHECK: ret void
entry:
store atomic i32 %x, i32* %p seq_cst, align 16
ret void
}
define void @AtomicStoreRelease(i32* %p, i32 %x) {
; COMM: atomic store: store clean shadow value before app value
; CHECK-LABEL: @AtomicStoreRelease.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK_ORIGIN-NOT: 35184372088832
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, i32* %p release, align 16
; CHECK: ret void
entry:
store atomic i32 %x, i32* %p release, align 16
ret void
}
define void @AtomicStoreMonotonic(i32* %p, i32 %x) {
; COMM: atomic store monotonic: bumped up to store release
; CHECK-LABEL: @AtomicStoreMonotonic.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK_ORIGIN-NOT: 35184372088832
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, i32* %p release, align 16
; CHECK: ret void
entry:
store atomic i32 %x, i32* %p monotonic, align 16
ret void
}
define void @AtomicStoreUnordered(i32* %p, i32 %x) {
; COMM: atomic store unordered: bumped up to store release
; CHECK-LABEL: @AtomicStoreUnordered.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK_ORIGIN-NOT: 35184372088832
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, i32* %p release, align 16
; CHECK: ret void
entry:
store atomic i32 %x, i32* %p unordered, align 16
ret void
}
|