File: AsmPredicateCondsEmission.td

package info (click to toggle)
llvm-toolchain-14 1%3A14.0.6-12
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 1,496,180 kB
  • sloc: cpp: 5,593,972; ansic: 986,872; asm: 585,869; python: 184,223; objc: 72,530; lisp: 31,119; f90: 27,793; javascript: 9,780; pascal: 9,762; sh: 9,482; perl: 7,468; ml: 5,432; awk: 3,523; makefile: 2,538; xml: 953; cs: 573; fortran: 567
file content (32 lines) | stat: -rw-r--r-- 963 bytes parent folder | download | duplicates (27) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
 
// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s

// Check that we don't generate invalid code of the form "( && Cond2)" when
// emitting AssemblerPredicate conditions. In the example below, the invalid
// code would be: "return ( && (Bits & arch::AssemblerCondition2));".

include "llvm/Target/Target.td"

def archInstrInfo : InstrInfo { }

def arch : Target {
  let InstructionSet = archInstrInfo;
}

def AssemblerCondition2 : SubtargetFeature<"cond2", "cond2", "true", "">;
def Pred1 : Predicate<"Condition1">;
def Pred2 : Predicate<"Condition2">,
            AssemblerPredicate<(all_of AssemblerCondition2)>;

def foo : Instruction {
  let Size = 2;
  let OutOperandList = (outs);
  let InOperandList = (ins);
  field bits<16> Inst;
  let Inst = 0xAAAA;
  let AsmString = "foo";
  field bits<16> SoftFail = 0;
  // This is the important bit:
  let Predicates = [Pred1, Pred2];
}

// CHECK: return (Bits[arch::AssemblerCondition2]);