File: trunc_const_expr.ll

package info (click to toggle)
llvm-toolchain-14 1%3A14.0.6-12
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 1,496,180 kB
  • sloc: cpp: 5,593,972; ansic: 986,872; asm: 585,869; python: 184,223; objc: 72,530; lisp: 31,119; f90: 27,793; javascript: 9,780; pascal: 9,762; sh: 9,482; perl: 7,468; ml: 5,432; awk: 3,523; makefile: 2,538; xml: 953; cs: 573; fortran: 567
file content (142 lines) | stat: -rw-r--r-- 4,889 bytes parent folder | download | duplicates (16)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

; Aggressive Instcombine should be able to reduce width of these constant
; expressions, without crashing.

declare i32 @use32(i32)
declare <2 x i32> @use32_vec(<2 x i32>)
declare <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32>)

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; These tests check cases where expression dag post-dominated by TruncInst
;; contains instruction, which has more than one usage.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

define void @const_expression_mul() {
; CHECK-LABEL: @const_expression_mul(
; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @use32(i32 242)
; CHECK-NEXT:    ret void
;
  %A = mul i64 11, 22
  %T = trunc i64 %A to i32
  call i32 @use32(i32 %T)
  ret void
}

define void @const_expression_zext() {
; CHECK-LABEL: @const_expression_zext(
; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @use32(i32 33)
; CHECK-NEXT:    ret void
;
  %A = zext i32 33 to i64
  %T = trunc i64 %A to i32
  call i32 @use32(i32 %T)
  ret void
}

define void @const_expression_trunc() {
; CHECK-LABEL: @const_expression_trunc(
; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @use32(i32 44)
; CHECK-NEXT:    ret void
;
  %T = trunc i64 44 to i32
  call i32 @use32(i32 %T)
  ret void
}

; Check that we handle constant expression trunc instruction, when it is a leaf
; of other trunc expression pattern:
; 1. %T1 is the constant expression trunc instruction.
; 2. %T2->%T1 is the trunc expression pattern we want to reduce.
define void @const_expression_trunc_leaf() {
; CHECK-LABEL: @const_expression_trunc_leaf(
; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @use32(i32 44)
; CHECK-NEXT:    ret void
;
  %T1 = trunc i64 44 to i48
  %T2 = trunc i48 %T1 to i32
  call i32 @use32(i32 %T2)
  ret void
}

; Check that we handle zext instruction, which turns into trunc instruction.
; Notice that there are two expression patterns below:
; 1. %T2->%T1
; 2. %T1`->%A (where %T1` is the reduced node of %T1 into trunc instruction)
define void @const_expression_zext_to_trunc() {
; CHECK-LABEL: @const_expression_zext_to_trunc(
; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @use32(i32 44)
; CHECK-NEXT:    ret void
;
  %A = add i64 11, 33
  %T1 = zext i64 %A to i128
  %T2 = trunc i128 %T1 to i32
  call i32 @use32(i32 %T2)
  ret void
}

define void @const_expression_mul_vec() {
; CHECK-LABEL: @const_expression_mul_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> <i32 24531, i32 24864>)
; CHECK-NEXT:    ret void
;
  %A = mul <2 x i64> <i64 111, i64 112>, <i64 221, i64 222>
  %T = trunc <2 x i64> %A to <2 x i32>
  call <2 x i32> @use32_vec(<2 x i32> %T)
  ret void
}

define void @const_expression_zext_vec() {
; CHECK-LABEL: @const_expression_zext_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> <i32 331, i32 332>)
; CHECK-NEXT:    ret void
;
  %A = zext <2 x i32> <i32 331, i32 332> to <2 x i64>
  %T = trunc <2 x i64> %A to <2 x i32>
  call <2 x i32> @use32_vec(<2 x i32> %T)
  ret void
}

define void @const_expression_trunc_vec() {
; CHECK-LABEL: @const_expression_trunc_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> <i32 551, i32 552>)
; CHECK-NEXT:    ret void
;
  %T = trunc <2 x i64> <i64 551, i64 552> to <2 x i32>
  call <2 x i32> @use32_vec(<2 x i32> %T)
  ret void
}

define void @const_expression_mul_scale_vec() {
; CHECK-LABEL: @const_expression_mul_scale_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
; CHECK-NEXT:    ret void
;
  %A = mul <vscale x 2 x i64> zeroinitializer, zeroinitializer
  %T = trunc <vscale x 2 x i64> %A to <vscale x 2 x i32>
  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
  ret void
}

define void @const_expression_zext_scale_vec() {
; CHECK-LABEL: @const_expression_zext_scale_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
; CHECK-NEXT:    ret void
;
  %A = zext <vscale x 2 x i32> zeroinitializer to <vscale x 2 x i64>
  %T = trunc <vscale x 2 x i64> %A to <vscale x 2 x i32>
  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
  ret void
}

define void @const_expression_trunc_scale_vec() {
; CHECK-LABEL: @const_expression_trunc_scale_vec(
; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
; CHECK-NEXT:    ret void
;
  %T = trunc <vscale x 2 x i64> zeroinitializer to <vscale x 2 x i32>
  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
  ret void
}