1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -div-rem-pairs -S -mtriple=powerpc64-unknown-unknown | FileCheck %s
declare void @foo(i32, i32)
define void @decompose_illegal_srem_same_block(i32 %a, i32 %b) {
; CHECK-LABEL: @decompose_illegal_srem_same_block(
; CHECK-NEXT: [[A_FROZEN:%.*]] = freeze i32 [[A:%.*]]
; CHECK-NEXT: [[B_FROZEN:%.*]] = freeze i32 [[B:%.*]]
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A_FROZEN]], [[B_FROZEN]]
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[DIV]], [[B_FROZEN]]
; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i32 [[A_FROZEN]], [[TMP1]]
; CHECK-NEXT: call void @foo(i32 [[REM_DECOMPOSED]], i32 [[DIV]])
; CHECK-NEXT: ret void
;
%rem = srem i32 %a, %b
%div = sdiv i32 %a, %b
call void @foo(i32 %rem, i32 %div)
ret void
}
define void @decompose_illegal_urem_same_block(i32 %a, i32 %b) {
; CHECK-LABEL: @decompose_illegal_urem_same_block(
; CHECK-NEXT: [[A_FROZEN:%.*]] = freeze i32 [[A:%.*]]
; CHECK-NEXT: [[B_FROZEN:%.*]] = freeze i32 [[B:%.*]]
; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A_FROZEN]], [[B_FROZEN]]
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[DIV]], [[B_FROZEN]]
; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i32 [[A_FROZEN]], [[TMP1]]
; CHECK-NEXT: call void @foo(i32 [[REM_DECOMPOSED]], i32 [[DIV]])
; CHECK-NEXT: ret void
;
%div = udiv i32 %a, %b
%rem = urem i32 %a, %b
call void @foo(i32 %rem, i32 %div)
ret void
}
; Hoist and optionally decompose the sdiv because it's safe and free.
; PR31028 - https://bugs.llvm.org/show_bug.cgi?id=31028
define i32 @hoist_sdiv(i32 %a, i32 %b) {
; CHECK-LABEL: @hoist_sdiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_FROZEN:%.*]] = freeze i32 [[A:%.*]]
; CHECK-NEXT: [[B_FROZEN:%.*]] = freeze i32 [[B:%.*]]
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A_FROZEN]], [[B_FROZEN]]
; CHECK-NEXT: [[TMP0:%.*]] = mul i32 [[DIV]], [[B_FROZEN]]
; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i32 [[A_FROZEN]], [[TMP0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM_DECOMPOSED]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
%rem = srem i32 %a, %b
%cmp = icmp eq i32 %rem, 42
br i1 %cmp, label %if, label %end
if:
%div = sdiv i32 %a, %b
br label %end
end:
%ret = phi i32 [ %div, %if ], [ 3, %entry ]
ret i32 %ret
}
; Hoist and optionally decompose the udiv because it's safe and free.
define i64 @hoist_udiv(i64 %a, i64 %b) {
; CHECK-LABEL: @hoist_udiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_FROZEN:%.*]] = freeze i64 [[A:%.*]]
; CHECK-NEXT: [[B_FROZEN:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[A_FROZEN]], [[B_FROZEN]]
; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[DIV]], [[B_FROZEN]]
; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i64 [[A_FROZEN]], [[TMP0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[REM_DECOMPOSED]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i64 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i64 [[RET]]
;
entry:
%rem = urem i64 %a, %b
%cmp = icmp eq i64 %rem, 42
br i1 %cmp, label %if, label %end
if:
%div = udiv i64 %a, %b
br label %end
end:
%ret = phi i64 [ %div, %if ], [ 3, %entry ]
ret i64 %ret
}
; Hoist the srem if it's safe and free, otherwise decompose it.
define i16 @hoist_srem(i16 %a, i16 %b) {
; CHECK-LABEL: @hoist_srem(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_FROZEN:%.*]] = freeze i16 [[A:%.*]]
; CHECK-NEXT: [[B_FROZEN:%.*]] = freeze i16 [[B:%.*]]
; CHECK-NEXT: [[DIV:%.*]] = sdiv i16 [[A_FROZEN]], [[B_FROZEN]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[DIV]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
; CHECK-NEXT: [[TMP0:%.*]] = mul i16 [[DIV]], [[B_FROZEN]]
; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i16 [[A_FROZEN]], [[TMP0]]
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i16 [ [[REM_DECOMPOSED]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i16 [[RET]]
;
entry:
%div = sdiv i16 %a, %b
%cmp = icmp eq i16 %div, 42
br i1 %cmp, label %if, label %end
if:
%rem = srem i16 %a, %b
br label %end
end:
%ret = phi i16 [ %rem, %if ], [ 3, %entry ]
ret i16 %ret
}
; Hoist the urem if it's safe and free, otherwise decompose it.
define i8 @hoist_urem(i8 %a, i8 %b) {
; CHECK-LABEL: @hoist_urem(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_FROZEN:%.*]] = freeze i8 [[A:%.*]]
; CHECK-NEXT: [[B_FROZEN:%.*]] = freeze i8 [[B:%.*]]
; CHECK-NEXT: [[DIV:%.*]] = udiv i8 [[A_FROZEN]], [[B_FROZEN]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[DIV]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
; CHECK-NEXT: [[TMP0:%.*]] = mul i8 [[DIV]], [[B_FROZEN]]
; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i8 [[A_FROZEN]], [[TMP0]]
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i8 [ [[REM_DECOMPOSED]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i8 [[RET]]
;
entry:
%div = udiv i8 %a, %b
%cmp = icmp eq i8 %div, 42
br i1 %cmp, label %if, label %end
if:
%rem = urem i8 %a, %b
br label %end
end:
%ret = phi i8 [ %rem, %if ], [ 3, %entry ]
ret i8 %ret
}
; Be careful with RAUW/invalidation if this is a srem-of-srem.
define i32 @srem_of_srem_unexpanded(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @srem_of_srem_unexpanded(
; CHECK-NEXT: [[T0:%.*]] = mul nsw i32 [[Z:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[X_FROZEN:%.*]] = freeze i32 [[X:%.*]]
; CHECK-NEXT: [[T0_FROZEN:%.*]] = freeze i32 [[T0]]
; CHECK-NEXT: [[T1:%.*]] = sdiv i32 [[X_FROZEN]], [[T0_FROZEN]]
; CHECK-NEXT: [[T2:%.*]] = mul nsw i32 [[T0]], [[T1]]
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[T1]], [[T0_FROZEN]]
; CHECK-NEXT: [[T3_DECOMPOSED:%.*]] = sub i32 [[X_FROZEN]], [[TMP1]]
; CHECK-NEXT: [[Y_FROZEN:%.*]] = freeze i32 [[Y]]
; CHECK-NEXT: [[T4:%.*]] = sdiv i32 [[T3_DECOMPOSED]], [[Y_FROZEN]]
; CHECK-NEXT: [[T5:%.*]] = mul nsw i32 [[T4]], [[Y]]
; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[T4]], [[Y_FROZEN]]
; CHECK-NEXT: [[T6_DECOMPOSED:%.*]] = sub i32 [[T3_DECOMPOSED]], [[TMP2]]
; CHECK-NEXT: ret i32 [[T6_DECOMPOSED]]
;
%t0 = mul nsw i32 %Z, %Y
%t1 = sdiv i32 %X, %t0
%t2 = mul nsw i32 %t0, %t1
%t3 = srem i32 %X, %t0
%t4 = sdiv i32 %t3, %Y
%t5 = mul nsw i32 %t4, %Y
%t6 = srem i32 %t3, %Y
ret i32 %t6
}
define i32 @srem_of_srem_expanded(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @srem_of_srem_expanded(
; CHECK-NEXT: [[T0:%.*]] = mul nsw i32 [[Z:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[T1:%.*]] = sdiv i32 [[X:%.*]], [[T0]]
; CHECK-NEXT: [[T2:%.*]] = mul nsw i32 [[T0]], [[T1]]
; CHECK-NEXT: [[T3:%.*]] = sub nsw i32 [[X]], [[T2]]
; CHECK-NEXT: [[T4:%.*]] = sdiv i32 [[T3]], [[Y]]
; CHECK-NEXT: [[T5:%.*]] = mul nsw i32 [[T4]], [[Y]]
; CHECK-NEXT: [[T6:%.*]] = sub nsw i32 [[T3]], [[T5]]
; CHECK-NEXT: ret i32 [[T6]]
;
%t0 = mul nsw i32 %Z, %Y
%t1 = sdiv i32 %X, %t0
%t2 = mul nsw i32 %t0, %t1
%t3 = sub nsw i32 %X, %t2
%t4 = sdiv i32 %t3, %Y
%t5 = mul nsw i32 %t4, %Y
%t6 = sub nsw i32 %t3, %t5
ret i32 %t6
}
; If the ops don't match, don't do anything: signedness.
define i32 @dont_hoist_udiv(i32 %a, i32 %b) {
; CHECK-LABEL: @dont_hoist_udiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A]], [[B]]
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
%rem = srem i32 %a, %b
%cmp = icmp eq i32 %rem, 42
br i1 %cmp, label %if, label %end
if:
%div = udiv i32 %a, %b
br label %end
end:
%ret = phi i32 [ %div, %if ], [ 3, %entry ]
ret i32 %ret
}
; If the ops don't match, don't do anything: operation.
define i32 @dont_hoist_srem(i32 %a, i32 %b) {
; CHECK-LABEL: @dont_hoist_srem(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[REM:%.*]] = urem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
; CHECK-NEXT: [[REM2:%.*]] = srem i32 [[A]], [[B]]
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[REM2]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
%rem = urem i32 %a, %b
%cmp = icmp eq i32 %rem, 42
br i1 %cmp, label %if, label %end
if:
%rem2 = srem i32 %a, %b
br label %end
end:
%ret = phi i32 [ %rem2, %if ], [ 3, %entry ]
ret i32 %ret
}
; If the ops don't match, don't do anything: operands.
define i32 @dont_hoist_sdiv(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @dont_hoist_sdiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A]], [[C:%.*]]
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
%rem = srem i32 %a, %b
%cmp = icmp eq i32 %rem, 42
br i1 %cmp, label %if, label %end
if:
%div = sdiv i32 %a, %c
br label %end
end:
%ret = phi i32 [ %div, %if ], [ 3, %entry ]
ret i32 %ret
}
; If the target doesn't have a unified div/rem op for the type, decompose rem in-place to mul+sub.
define i128 @dont_hoist_urem(i128 %a, i128 %b) {
; CHECK-LABEL: @dont_hoist_urem(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_FROZEN:%.*]] = freeze i128 [[A:%.*]]
; CHECK-NEXT: [[B_FROZEN:%.*]] = freeze i128 [[B:%.*]]
; CHECK-NEXT: [[DIV:%.*]] = udiv i128 [[A_FROZEN]], [[B_FROZEN]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i128 [[DIV]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
; CHECK-NEXT: [[TMP0:%.*]] = mul i128 [[DIV]], [[B_FROZEN]]
; CHECK-NEXT: [[REM_DECOMPOSED:%.*]] = sub i128 [[A_FROZEN]], [[TMP0]]
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i128 [ [[REM_DECOMPOSED]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i128 [[RET]]
;
entry:
%div = udiv i128 %a, %b
%cmp = icmp eq i128 %div, 42
br i1 %cmp, label %if, label %end
if:
%rem = urem i128 %a, %b
br label %end
end:
%ret = phi i128 [ %rem, %if ], [ 3, %entry ]
ret i128 %ret
}
; We don't hoist if one op does not dominate the other,
; but we could hoist both ops to the common predecessor block?
define i32 @no_domination(i1 %cmp, i32 %a, i32 %b) {
; CHECK-LABEL: @no_domination(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
; CHECK: if:
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: br label [[END:%.*]]
; CHECK: else:
; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A]], [[B]]
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ [[REM]], [[ELSE]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
br i1 %cmp, label %if, label %else
if:
%div = sdiv i32 %a, %b
br label %end
else:
%rem = srem i32 %a, %b
br label %end
end:
%ret = phi i32 [ %div, %if ], [ %rem, %else ]
ret i32 %ret
}
|
