1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -instcombine < %s | FileCheck %s --check-prefixes=CHECK,LITTLE
; RUN: opt -S -instcombine -data-layout="E" < %s | FileCheck %s --check-prefixes=CHECK,BIG
define i8 @load_smaller_int(i16* %p) {
; LITTLE-LABEL: @load_smaller_int(
; LITTLE-NEXT: store i16 258, i16* [[P:%.*]], align 2
; LITTLE-NEXT: ret i8 2
;
; BIG-LABEL: @load_smaller_int(
; BIG-NEXT: store i16 258, i16* [[P:%.*]], align 2
; BIG-NEXT: ret i8 1
;
store i16 258, i16* %p
%p2 = bitcast i16* %p to i8*
%load = load i8, i8* %p2
ret i8 %load
}
; This case can *not* be forwarded, as we only see part of the stored value.
define i32 @load_larger_int(i16* %p) {
; CHECK-LABEL: @load_larger_int(
; CHECK-NEXT: store i16 258, i16* [[P:%.*]], align 2
; CHECK-NEXT: [[P2:%.*]] = bitcast i16* [[P]] to i32*
; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P2]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
store i16 258, i16* %p
%p2 = bitcast i16* %p to i32*
%load = load i32, i32* %p2
ret i32 %load
}
define i32 @vec_store_load_first(i32* %p) {
; CHECK-LABEL: @vec_store_load_first(
; CHECK-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to <2 x i32>*
; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, <2 x i32>* [[P2]], align 8
; CHECK-NEXT: ret i32 1
;
%p2 = bitcast i32* %p to <2 x i32>*
store <2 x i32> <i32 1, i32 2>, <2 x i32>* %p2
%load = load i32, i32* %p
ret i32 %load
}
define i17 @vec_store_load_first_odd_size(i17* %p) {
; CHECK-LABEL: @vec_store_load_first_odd_size(
; CHECK-NEXT: [[P2:%.*]] = bitcast i17* [[P:%.*]] to <2 x i17>*
; CHECK-NEXT: store <2 x i17> <i17 1, i17 2>, <2 x i17>* [[P2]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load i17, i17* [[P]], align 4
; CHECK-NEXT: ret i17 [[LOAD]]
;
%p2 = bitcast i17* %p to <2 x i17>*
store <2 x i17> <i17 1, i17 2>, <2 x i17>* %p2
%load = load i17, i17* %p
ret i17 %load
}
define i32 @vec_store_load_first_constexpr(i32* %p) {
; CHECK-LABEL: @vec_store_load_first_constexpr(
; CHECK-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to <2 x i32>*
; CHECK-NEXT: store <2 x i32> bitcast (i64 ptrtoint (i32 (i32*)* @vec_store_load_first to i64) to <2 x i32>), <2 x i32>* [[P2]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%p2 = bitcast i32* %p to <2 x i32>*
store <2 x i32> bitcast (i64 ptrtoint (i32 (i32*)* @vec_store_load_first to i64) to <2 x i32>), <2 x i32>* %p2, align 8
%load = load i32, i32* %p, align 4
ret i32 %load
}
define i32 @vec_store_load_second(i32* %p) {
; CHECK-LABEL: @vec_store_load_second(
; CHECK-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to <2 x i32>*
; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, <2 x i32>* [[P2]], align 8
; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, i32* [[P]], i64 1
; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P3]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%p2 = bitcast i32* %p to <2 x i32>*
store <2 x i32> <i32 1, i32 2>, <2 x i32>* %p2
%p3 = getelementptr i32, i32* %p, i64 1
%load = load i32, i32* %p3
ret i32 %load
}
define i64 @vec_store_load_whole(i32* %p) {
; LITTLE-LABEL: @vec_store_load_whole(
; LITTLE-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to <2 x i32>*
; LITTLE-NEXT: store <2 x i32> <i32 1, i32 2>, <2 x i32>* [[P2]], align 8
; LITTLE-NEXT: ret i64 8589934593
;
; BIG-LABEL: @vec_store_load_whole(
; BIG-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to <2 x i32>*
; BIG-NEXT: store <2 x i32> <i32 1, i32 2>, <2 x i32>* [[P2]], align 8
; BIG-NEXT: ret i64 4294967298
;
%p2 = bitcast i32* %p to <2 x i32>*
store <2 x i32> <i32 1, i32 2>, <2 x i32>* %p2
%p3 = bitcast i32* %p to i64*
%load = load i64, i64* %p3
ret i64 %load
}
define i32 @vec_store_load_overlap(i32* %p) {
; CHECK-LABEL: @vec_store_load_overlap(
; CHECK-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to <2 x i32>*
; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, <2 x i32>* [[P2]], align 8
; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P]] to i8*
; CHECK-NEXT: [[P4:%.*]] = getelementptr i8, i8* [[P3]], i64 2
; CHECK-NEXT: [[P5:%.*]] = bitcast i8* [[P4]] to i32*
; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P5]], align 2
; CHECK-NEXT: ret i32 [[LOAD]]
;
%p2 = bitcast i32* %p to <2 x i32>*
store <2 x i32> <i32 1, i32 2>, <2 x i32>* %p2
%p3 = bitcast i32* %p to i8*
%p4 = getelementptr i8, i8* %p3, i64 2
%p5 = bitcast i8* %p4 to i32*
%load = load i32, i32* %p5, align 2
ret i32 %load
}
define i32 @load_i32_store_nxv4i32(i32* %a) {
; CHECK-LABEL: @load_i32_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[A:%.*]] to <vscale x 4 x i32>*
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* [[TMP0]], align 16
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
; CHECK-NEXT: ret i32 [[TMP1]]
;
entry:
%0 = bitcast i32* %a to <vscale x 4 x i32>*
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* %0, align 16
%1 = load i32, i32* %a, align 4
ret i32 %1
}
define i64 @load_i64_store_nxv8i8(i8* %a) {
; CHECK-LABEL: @load_i64_store_nxv8i8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[A:%.*]] to <vscale x 8 x i8>*
; CHECK-NEXT: store <vscale x 8 x i8> shufflevector (<vscale x 8 x i8> insertelement (<vscale x 8 x i8> poison, i8 1, i32 0), <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer), <vscale x 8 x i8>* [[TMP0]], align 16
; CHECK-NEXT: [[A2:%.*]] = bitcast i8* [[A]] to i64*
; CHECK-NEXT: [[LOAD:%.*]] = load i64, i64* [[A2]], align 8
; CHECK-NEXT: ret i64 [[LOAD]]
;
entry:
%0 = bitcast i8* %a to <vscale x 8 x i8>*
store <vscale x 8 x i8> shufflevector (<vscale x 8 x i8> insertelement (<vscale x 8 x i8> poison, i8 1, i32 0), <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer), <vscale x 8 x i8>* %0, align 16
%a2 = bitcast i8* %a to i64*
%load = load i64, i64* %a2, align 8
ret i64 %load
}
define i64 @load_i64_store_nxv4i32(i32* %a) {
; CHECK-LABEL: @load_i64_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[A:%.*]] to <vscale x 4 x i32>*
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* [[TMP0]], align 16
; CHECK-NEXT: [[A2:%.*]] = bitcast i32* [[A]] to i64*
; CHECK-NEXT: [[LOAD:%.*]] = load i64, i64* [[A2]], align 8
; CHECK-NEXT: ret i64 [[LOAD]]
;
entry:
%0 = bitcast i32* %a to <vscale x 4 x i32>*
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* %0, align 16
%a2 = bitcast i32* %a to i64*
%load = load i64, i64* %a2, align 8
ret i64 %load
}
define i8 @load_i8_store_nxv4i32(i32* %a) {
; CHECK-LABEL: @load_i8_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[A:%.*]] to <vscale x 4 x i32>*
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* [[TMP0]], align 16
; CHECK-NEXT: [[A2:%.*]] = bitcast i32* [[A]] to i8*
; CHECK-NEXT: [[LOAD:%.*]] = load i8, i8* [[A2]], align 1
; CHECK-NEXT: ret i8 [[LOAD]]
;
entry:
%0 = bitcast i32* %a to <vscale x 4 x i32>*
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* %0, align 16
%a2 = bitcast i32* %a to i8*
%load = load i8, i8* %a2, align 1
ret i8 %load
}
define float @load_f32_store_nxv4f32(float* %a) {
; CHECK-LABEL: @load_f32_store_nxv4f32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[A:%.*]] to <vscale x 4 x float>*
; CHECK-NEXT: store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x float>* [[TMP0]], align 16
; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[A]], align 4
; CHECK-NEXT: ret float [[TMP1]]
;
entry:
%0 = bitcast float* %a to <vscale x 4 x float>*
store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.0, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x float>* %0, align 16
%1 = load float, float* %a, align 4
ret float %1
}
define i32 @load_i32_store_nxv4f32(float* %a) {
; CHECK-LABEL: @load_i32_store_nxv4f32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[A:%.*]] to <vscale x 4 x float>*
; CHECK-NEXT: store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x float>* [[TMP0]], align 16
; CHECK-NEXT: [[A2:%.*]] = bitcast float* [[A]] to i32*
; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[A2]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
entry:
%0 = bitcast float* %a to <vscale x 4 x float>*
store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.0, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x float>* %0, align 16
%a2 = bitcast float* %a to i32*
%load = load i32, i32* %a2, align 4
ret i32 %load
}
define <4 x i32> @load_v4i32_store_nxv4i32(i32* %a) {
; CHECK-LABEL: @load_v4i32_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[A:%.*]] to <vscale x 4 x i32>*
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* [[TMP0]], align 16
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to <4 x i32>*
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 16
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
;
entry:
%0 = bitcast i32* %a to <vscale x 4 x i32>*
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* %0, align 16
%1 = bitcast i32* %a to <4 x i32>*
%2 = load <4 x i32>, <4 x i32>* %1, align 16
ret <4 x i32> %2
}
define <4 x i16> @load_v4i16_store_nxv4i32(i32* %a) {
; CHECK-LABEL: @load_v4i16_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[A:%.*]] to <vscale x 4 x i32>*
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* [[TMP0]], align 16
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to <4 x i16>*
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i16>, <4 x i16>* [[TMP1]], align 16
; CHECK-NEXT: ret <4 x i16> [[TMP2]]
;
entry:
%0 = bitcast i32* %a to <vscale x 4 x i32>*
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* %0, align 16
%1 = bitcast i32* %a to <4 x i16>*
%2 = load <4 x i16>, <4 x i16>* %1, align 16
ret <4 x i16> %2
}
; Loaded data type exceeds the known minimum size of the store.
define i64 @load_i64_store_nxv4i8(i8* %a) {
; CHECK-LABEL: @load_i64_store_nxv4i8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[A:%.*]] to <vscale x 4 x i8>*
; CHECK-NEXT: store <vscale x 4 x i8> shufflevector (<vscale x 4 x i8> insertelement (<vscale x 4 x i8> poison, i8 1, i32 0), <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i8>* [[TMP0]], align 16
; CHECK-NEXT: [[A2:%.*]] = bitcast i8* [[A]] to i64*
; CHECK-NEXT: [[LOAD:%.*]] = load i64, i64* [[A2]], align 8
; CHECK-NEXT: ret i64 [[LOAD]]
;
entry:
%0 = bitcast i8* %a to <vscale x 4 x i8>*
store <vscale x 4 x i8> shufflevector (<vscale x 4 x i8> insertelement (<vscale x 4 x i8> poison, i8 1, i32 0), <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i8>* %0, align 16
%a2 = bitcast i8* %a to i64*
%load = load i64, i64* %a2, align 8
ret i64 %load
}
; Loaded data size is unknown - we cannot guarantee it won't
; exceed the store size.
define <vscale x 4 x i8> @load_nxv4i8_store_nxv4i32(i32* %a) {
; CHECK-LABEL: @load_nxv4i8_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[A:%.*]] to <vscale x 4 x i32>*
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* [[TMP0]], align 16
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[A]] to <vscale x 4 x i8>*
; CHECK-NEXT: [[TMP2:%.*]] = load <vscale x 4 x i8>, <vscale x 4 x i8>* [[TMP1]], align 16
; CHECK-NEXT: ret <vscale x 4 x i8> [[TMP2]]
;
entry:
%0 = bitcast i32* %a to <vscale x 4 x i32>*
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32>* %0, align 16
%1 = bitcast i32* %a to <vscale x 4 x i8>*
%2 = load <vscale x 4 x i8>, <vscale x 4 x i8>* %1, align 16
ret <vscale x 4 x i8> %2
}
|
