1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=vector-combine -S %s | FileCheck %s
target triple = "arm64-apple-darwin"
define void @load_extract_insert_store_const_idx(<225 x double>* %A) {
; CHECK-LABEL: @load_extract_insert_store_const_idx(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A:%.*]], i32 0, i64 0
; CHECK-NEXT: [[EXT_0:%.*]] = load double, double* [[TMP0]], align 8
; CHECK-NEXT: [[MUL:%.*]] = fmul double 2.000000e+01, [[EXT_0]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A]], i32 0, i64 1
; CHECK-NEXT: [[EXT_1:%.*]] = load double, double* [[TMP1]], align 8
; CHECK-NEXT: [[SUB:%.*]] = fsub double [[EXT_1]], [[MUL]]
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A]], i64 0, i64 1
; CHECK-NEXT: store double [[SUB]], double* [[TMP2]], align 8
; CHECK-NEXT: ret void
;
entry:
%lv = load <225 x double>, <225 x double>* %A, align 8
%ext.0 = extractelement <225 x double> %lv, i64 0
%mul = fmul double 20.0, %ext.0
%ext.1 = extractelement <225 x double> %lv, i64 1
%sub = fsub double %ext.1, %mul
%ins = insertelement <225 x double> %lv, double %sub, i64 1
store <225 x double> %ins, <225 x double>* %A, align 8
ret void
}
define void @load_extract_insert_store_var_idx_assume_valid(i64 %idx.1, i64 %idx.2, <225 x double>* %A) {
; CHECK-LABEL: @load_extract_insert_store_var_idx_assume_valid(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i64 [[IDX_1:%.*]], 225
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_1]])
; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i64 [[IDX_2:%.*]], 225
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_2]])
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A:%.*]], i32 0, i64 [[IDX_1]]
; CHECK-NEXT: [[EXT_0:%.*]] = load double, double* [[TMP0]], align 8
; CHECK-NEXT: [[MUL:%.*]] = fmul double 2.000000e+01, [[EXT_0]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A]], i32 0, i64 [[IDX_2]]
; CHECK-NEXT: [[EXT_1:%.*]] = load double, double* [[TMP1]], align 8
; CHECK-NEXT: [[SUB:%.*]] = fsub double [[EXT_1]], [[MUL]]
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A]], i64 0, i64 [[IDX_1]]
; CHECK-NEXT: store double [[SUB]], double* [[TMP2]], align 8
; CHECK-NEXT: ret void
;
entry:
%cmp.1 = icmp ult i64 %idx.1, 225
call void @llvm.assume(i1 %cmp.1)
%cmp.2 = icmp ult i64 %idx.2, 225
call void @llvm.assume(i1 %cmp.2)
%lv = load <225 x double>, <225 x double>* %A, align 8
%ext.0 = extractelement <225 x double> %lv, i64 %idx.1
%mul = fmul double 20.0, %ext.0
%ext.1 = extractelement <225 x double> %lv, i64 %idx.2
%sub = fsub double %ext.1, %mul
%ins = insertelement <225 x double> %lv, double %sub, i64 %idx.1
store <225 x double> %ins, <225 x double>* %A, align 8
ret void
}
declare i1 @cond()
define void @load_extract_insert_store_var_idx_assume_valid_in_dominating_block(i64 %idx.1, i64 %idx.2, <225 x double>* %A, i1 %c.1) {
; CHECK-LABEL: @load_extract_insert_store_var_idx_assume_valid_in_dominating_block(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i64 [[IDX_1:%.*]], 225
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_1]])
; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i64 [[IDX_2:%.*]], 225
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_2]])
; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP:%.*]], label [[EXIT:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A:%.*]], i32 0, i64 [[IDX_1]]
; CHECK-NEXT: [[EXT_0:%.*]] = load double, double* [[TMP0]], align 8
; CHECK-NEXT: [[MUL:%.*]] = fmul double 2.000000e+01, [[EXT_0]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A]], i32 0, i64 [[IDX_2]]
; CHECK-NEXT: [[EXT_1:%.*]] = load double, double* [[TMP1]], align 8
; CHECK-NEXT: [[SUB:%.*]] = fsub double [[EXT_1]], [[MUL]]
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds <225 x double>, <225 x double>* [[A]], i64 0, i64 [[IDX_1]]
; CHECK-NEXT: store double [[SUB]], double* [[TMP2]], align 8
; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C_2]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
entry:
%cmp.1 = icmp ult i64 %idx.1, 225
call void @llvm.assume(i1 %cmp.1)
%cmp.2 = icmp ult i64 %idx.2, 225
call void @llvm.assume(i1 %cmp.2)
br i1 %c.1, label %loop, label %exit
loop:
%lv = load <225 x double>, <225 x double>* %A, align 8
%ext.0 = extractelement <225 x double> %lv, i64 %idx.1
%mul = fmul double 20.0, %ext.0
%ext.1 = extractelement <225 x double> %lv, i64 %idx.2
%sub = fsub double %ext.1, %mul
%ins = insertelement <225 x double> %lv, double %sub, i64 %idx.1
store <225 x double> %ins, <225 x double>* %A, align 8
%c.2 = call i1 @cond()
br i1 %c.2, label %loop, label %exit
exit:
ret void
}
define void @load_extract_insert_store_var_idx_assume_valid_in_non_dominating_block(i64 %idx.1, i64 %idx.2, <225 x double>* %A, i1 %c.1, i1 %c.2) {
; CHECK-LABEL: @load_extract_insert_store_var_idx_assume_valid_in_non_dominating_block(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C_1:%.*]], label [[ASSUME_BLOCK:%.*]], label [[LOOP:%.*]]
; CHECK: assume_block:
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i64 [[IDX_1:%.*]], 225
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_1]])
; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i64 [[IDX_2:%.*]], 225
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_2]])
; CHECK-NEXT: br i1 [[C_2:%.*]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[LV:%.*]] = load <225 x double>, <225 x double>* [[A:%.*]], align 8
; CHECK-NEXT: [[EXT_0:%.*]] = extractelement <225 x double> [[LV]], i64 [[IDX_1]]
; CHECK-NEXT: [[MUL:%.*]] = fmul double 2.000000e+01, [[EXT_0]]
; CHECK-NEXT: [[EXT_1:%.*]] = extractelement <225 x double> [[LV]], i64 [[IDX_2]]
; CHECK-NEXT: [[SUB:%.*]] = fsub double [[EXT_1]], [[MUL]]
; CHECK-NEXT: [[INS:%.*]] = insertelement <225 x double> [[LV]], double [[SUB]], i64 [[IDX_1]]
; CHECK-NEXT: store <225 x double> [[INS]], <225 x double>* [[A]], align 8
; CHECK-NEXT: [[C_3:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C_3]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
entry:
br i1 %c.1, label %assume_block, label %loop
assume_block:
%cmp.1 = icmp ult i64 %idx.1, 225
call void @llvm.assume(i1 %cmp.1)
%cmp.2 = icmp ult i64 %idx.2, 225
call void @llvm.assume(i1 %cmp.2)
br i1 %c.2, label %loop, label %exit
loop:
%lv = load <225 x double>, <225 x double>* %A, align 8
%ext.0 = extractelement <225 x double> %lv, i64 %idx.1
%mul = fmul double 20.0, %ext.0
%ext.1 = extractelement <225 x double> %lv, i64 %idx.2
%sub = fsub double %ext.1, %mul
%ins = insertelement <225 x double> %lv, double %sub, i64 %idx.1
store <225 x double> %ins, <225 x double>* %A, align 8
%c.3 = call i1 @cond()
br i1 %c.3, label %loop, label %exit
exit:
ret void
}
define void @load_extract_insert_store_var_idx_no_assume_valid(i64 %idx.1, i64 %idx.2, <225 x double>* %A) {
; CHECK-LABEL: @load_extract_insert_store_var_idx_no_assume_valid(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[LV:%.*]] = load <225 x double>, <225 x double>* [[A:%.*]], align 8
; CHECK-NEXT: [[EXT_0:%.*]] = extractelement <225 x double> [[LV]], i64 [[IDX_1:%.*]]
; CHECK-NEXT: [[MUL:%.*]] = fmul double 2.000000e+01, [[EXT_0]]
; CHECK-NEXT: [[EXT_1:%.*]] = extractelement <225 x double> [[LV]], i64 [[IDX_2:%.*]]
; CHECK-NEXT: [[SUB:%.*]] = fsub double [[EXT_1]], [[MUL]]
; CHECK-NEXT: [[INS:%.*]] = insertelement <225 x double> [[LV]], double [[SUB]], i64 [[IDX_1]]
; CHECK-NEXT: store <225 x double> [[INS]], <225 x double>* [[A]], align 8
; CHECK-NEXT: ret void
;
entry:
%lv = load <225 x double>, <225 x double>* %A, align 8
%ext.0 = extractelement <225 x double> %lv, i64 %idx.1
%mul = fmul double 20.0, %ext.0
%ext.1 = extractelement <225 x double> %lv, i64 %idx.2
%sub = fsub double %ext.1, %mul
%ins = insertelement <225 x double> %lv, double %sub, i64 %idx.1
store <225 x double> %ins, <225 x double>* %A, align 8
ret void
}
declare void @llvm.assume(i1)
|
