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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
--- |
define void @reloc_constant_sgpr32() { ret void }
define void @reloc_constant_vgpr32() { ret void }
declare i32 @llvm.amdgcn.reloc.constant(metadata)
!0 = !{!"arst"}
...
---
name: reloc_constant_sgpr32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: reloc_constant_sgpr32
; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 target-flags(amdgpu-abs32-lo) @arst
; GCN: $sgpr0 = COPY [[S_MOV_B32_]]
; GCN: S_ENDPGM 0, implicit $sgpr0
%0:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.reloc.constant), !0
$sgpr0 = COPY %0
S_ENDPGM 0, implicit $sgpr0
...
---
name: reloc_constant_vgpr32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: reloc_constant_vgpr32
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @arst, implicit $exec
; GCN: $vgpr0 = COPY [[V_MOV_B32_e32_]]
; GCN: S_ENDPGM 0, implicit $vgpr0
%0:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.reloc.constant), !0
$vgpr0 = COPY %0
S_ENDPGM 0, implicit $vgpr0
...
|
