File: builtins-ppc-xlcompat-LoadReseve-StoreCond.c

package info (click to toggle)
llvm-toolchain-15 1%3A15.0.6-4
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 1,554,644 kB
  • sloc: cpp: 5,922,452; ansic: 1,012,136; asm: 674,362; python: 191,568; objc: 73,855; f90: 42,327; lisp: 31,913; pascal: 11,973; javascript: 10,144; sh: 9,421; perl: 7,447; ml: 5,527; awk: 3,523; makefile: 2,520; xml: 885; cs: 573; fortran: 567
file content (63 lines) | stat: -rw-r--r-- 2,739 bytes parent folder | download
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -no-opaque-pointers -O2 -target-cpu pwr8 -triple=powerpc-unknown-aix \
// RUN:  -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -no-opaque-pointers -O2 -target-cpu pwr8 -triple=powerpc64-unknown-aix \
// RUN:  -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -no-opaque-pointers -O2 -target-cpu pwr8 -triple=powerpc64le-unknown-linux-gnu \
// RUN:  -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -no-opaque-pointers -O2 -target-cpu pwr8 -triple=powerpc64-unknown-linux-gnu \
// RUN:  -emit-llvm %s -o - | FileCheck %s
// RAUN: not %clang_cc1 -no-opaque-pointers -O2 -target-cpu pwr7 -triple=powerpc-unknown-aix \
// RAUN:  -emit-llvm %s -o - 2>&1 | FileCheck %s \
// RAUN:  --check-prefix=CHECK-NON-PWR8-ERR

int test_lwarx(volatile int* a) {
  // CHECK-LABEL: @test_lwarx
  // CHECK: %0 = tail call i32 asm sideeffect "lwarx $0, ${1:y}", "=r,*Z,~{memory}"(i32* elementtype(i32) %a)
  return __lwarx(a);
}

short test_lharx(volatile short *a) {
  // CHECK-LABEL: @test_lharx
  // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", "=r,*Z,~{memory}"(i16* elementtype(i16) %a)
  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
  return __lharx(a);
}

char test_lbarx(volatile char *a) {
  // CHECK-LABEL: @test_lbarx
  // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* elementtype(i8) %a)
  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
  return __lbarx(a);
}

int test_stwcx(volatile int* a, int val) {
  // CHECK-LABEL: @test_stwcx
  // CHECK: %0 = bitcast i32* %a to i8*
  // CHECK: %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %val)
  return __stwcx(a, val);
}

int test_sthcx(volatile short *a, short val) {
  // CHECK-LABEL: @test_sthcx
  // CHECK: %0 = bitcast i16* %a to i8*
  // CHECK: %1 = sext i16 %val to i32
  // CHECK: %2 = tail call i32 @llvm.ppc.sthcx(i8* %0, i32 %1)
  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
  return __sthcx(a, val);
}

// Extra test cases that previously caused error during usage.
int test_lharx_intret(volatile short *a) {
  // CHECK-LABEL: @test_lharx_intret
  // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", "=r,*Z,~{memory}"(i16* elementtype(i16) %a)
  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
  return __lharx(a);
}

int test_lbarx_intret(volatile char *a) {
  // CHECK-LABEL: @test_lbarx_intret
  // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* elementtype(i8) %a)
  // CHECK-NON-PWR8-ERR:  error: this builtin is only valid on POWER8 or later CPUs
  return __lbarx(a);
}