File: DXILStubs.td

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llvm-toolchain-15 1%3A15.0.6-4
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// DXIL doesn't actually use registers, but this gets the boilerplate code
// generated through tablegen.
let Namespace = "DXIL" in {
def DXIL : Register<"DXIL">;
def DXILClass : RegisterClass<"DXIL", [i32], 32, (add DXIL)>;
}

class DXILInst : Instruction {
  let Namespace = "DXIL";
  let DecoderNamespace = "DXIL";

  dag OutOperandList = (outs);
  dag InOperandList =  (ins);
  let AsmString = "dummy";
  let Pattern = [];
}

def DummyInst : DXILInst;