1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple arm-eabi -mattr=+v6t2 | FileCheck %s
; RUN: llc < %s -mtriple arm-eabi -mattr=+v6t2 -mattr=+neon | FileCheck %s
; RUN: llc < %s -mtriple thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMB
; This test checks the @llvm.cttz.* intrinsics for integers.
declare i8 @llvm.cttz.i8(i8, i1)
declare i16 @llvm.cttz.i16(i16, i1)
declare i32 @llvm.cttz.i32(i32, i1)
declare i64 @llvm.cttz.i64(i64, i1)
;------------------------------------------------------------------------------
define i8 @test_i8(i8 %a) {
; CHECK-LABEL: test_i8:
; CHECK: @ %bb.0:
; CHECK-NEXT: orr r0, r0, #256
; CHECK-NEXT: rbit r0, r0
; CHECK-NEXT: clz r0, r0
; CHECK-NEXT: bx lr
;
; CHECK-THUMB-LABEL: test_i8:
; CHECK-THUMB: @ %bb.0:
; CHECK-THUMB-NEXT: lsls r1, r0, #24
; CHECK-THUMB-NEXT: beq .LBB0_2
; CHECK-THUMB-NEXT: @ %bb.1: @ %cond.false
; CHECK-THUMB-NEXT: subs r1, r0, #1
; CHECK-THUMB-NEXT: bics r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r1, #1
; CHECK-THUMB-NEXT: ldr r2, .LCPI0_0
; CHECK-THUMB-NEXT: ands r2, r0
; CHECK-THUMB-NEXT: subs r0, r1, r2
; CHECK-THUMB-NEXT: ldr r1, .LCPI0_1
; CHECK-THUMB-NEXT: lsrs r2, r0, #2
; CHECK-THUMB-NEXT: ands r0, r1
; CHECK-THUMB-NEXT: ands r2, r1
; CHECK-THUMB-NEXT: adds r0, r0, r2
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ldr r1, .LCPI0_2
; CHECK-THUMB-NEXT: ands r1, r0
; CHECK-THUMB-NEXT: ldr r0, .LCPI0_3
; CHECK-THUMB-NEXT: muls r0, r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r0, #24
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .LBB0_2:
; CHECK-THUMB-NEXT: movs r0, #8
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .p2align 2
; CHECK-THUMB-NEXT: @ %bb.3:
; CHECK-THUMB-NEXT: .LCPI0_0:
; CHECK-THUMB-NEXT: .long 1431655765 @ 0x55555555
; CHECK-THUMB-NEXT: .LCPI0_1:
; CHECK-THUMB-NEXT: .long 858993459 @ 0x33333333
; CHECK-THUMB-NEXT: .LCPI0_2:
; CHECK-THUMB-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-THUMB-NEXT: .LCPI0_3:
; CHECK-THUMB-NEXT: .long 16843009 @ 0x1010101
%tmp = call i8 @llvm.cttz.i8(i8 %a, i1 false)
ret i8 %tmp
}
define i16 @test_i16(i16 %a) {
; CHECK-LABEL: test_i16:
; CHECK: @ %bb.0:
; CHECK-NEXT: orr r0, r0, #65536
; CHECK-NEXT: rbit r0, r0
; CHECK-NEXT: clz r0, r0
; CHECK-NEXT: bx lr
;
; CHECK-THUMB-LABEL: test_i16:
; CHECK-THUMB: @ %bb.0:
; CHECK-THUMB-NEXT: lsls r1, r0, #16
; CHECK-THUMB-NEXT: beq .LBB1_2
; CHECK-THUMB-NEXT: @ %bb.1: @ %cond.false
; CHECK-THUMB-NEXT: subs r1, r0, #1
; CHECK-THUMB-NEXT: bics r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r1, #1
; CHECK-THUMB-NEXT: ldr r2, .LCPI1_0
; CHECK-THUMB-NEXT: ands r2, r0
; CHECK-THUMB-NEXT: subs r0, r1, r2
; CHECK-THUMB-NEXT: ldr r1, .LCPI1_1
; CHECK-THUMB-NEXT: lsrs r2, r0, #2
; CHECK-THUMB-NEXT: ands r0, r1
; CHECK-THUMB-NEXT: ands r2, r1
; CHECK-THUMB-NEXT: adds r0, r0, r2
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ldr r1, .LCPI1_2
; CHECK-THUMB-NEXT: ands r1, r0
; CHECK-THUMB-NEXT: ldr r0, .LCPI1_3
; CHECK-THUMB-NEXT: muls r0, r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r0, #24
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .LBB1_2:
; CHECK-THUMB-NEXT: movs r0, #16
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .p2align 2
; CHECK-THUMB-NEXT: @ %bb.3:
; CHECK-THUMB-NEXT: .LCPI1_0:
; CHECK-THUMB-NEXT: .long 1431655765 @ 0x55555555
; CHECK-THUMB-NEXT: .LCPI1_1:
; CHECK-THUMB-NEXT: .long 858993459 @ 0x33333333
; CHECK-THUMB-NEXT: .LCPI1_2:
; CHECK-THUMB-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-THUMB-NEXT: .LCPI1_3:
; CHECK-THUMB-NEXT: .long 16843009 @ 0x1010101
%tmp = call i16 @llvm.cttz.i16(i16 %a, i1 false)
ret i16 %tmp
}
define i32 @test_i32(i32 %a) {
; CHECK-LABEL: test_i32:
; CHECK: @ %bb.0:
; CHECK-NEXT: rbit r0, r0
; CHECK-NEXT: clz r0, r0
; CHECK-NEXT: bx lr
;
; CHECK-THUMB-LABEL: test_i32:
; CHECK-THUMB: @ %bb.0:
; CHECK-THUMB-NEXT: cmp r0, #0
; CHECK-THUMB-NEXT: beq .LBB2_2
; CHECK-THUMB-NEXT: @ %bb.1: @ %cond.false
; CHECK-THUMB-NEXT: subs r1, r0, #1
; CHECK-THUMB-NEXT: bics r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r1, #1
; CHECK-THUMB-NEXT: ldr r2, .LCPI2_0
; CHECK-THUMB-NEXT: ands r2, r0
; CHECK-THUMB-NEXT: subs r0, r1, r2
; CHECK-THUMB-NEXT: ldr r1, .LCPI2_1
; CHECK-THUMB-NEXT: lsrs r2, r0, #2
; CHECK-THUMB-NEXT: ands r0, r1
; CHECK-THUMB-NEXT: ands r2, r1
; CHECK-THUMB-NEXT: adds r0, r0, r2
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ldr r1, .LCPI2_2
; CHECK-THUMB-NEXT: ands r1, r0
; CHECK-THUMB-NEXT: ldr r0, .LCPI2_3
; CHECK-THUMB-NEXT: muls r0, r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r0, #24
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .LBB2_2:
; CHECK-THUMB-NEXT: movs r0, #32
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .p2align 2
; CHECK-THUMB-NEXT: @ %bb.3:
; CHECK-THUMB-NEXT: .LCPI2_0:
; CHECK-THUMB-NEXT: .long 1431655765 @ 0x55555555
; CHECK-THUMB-NEXT: .LCPI2_1:
; CHECK-THUMB-NEXT: .long 858993459 @ 0x33333333
; CHECK-THUMB-NEXT: .LCPI2_2:
; CHECK-THUMB-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-THUMB-NEXT: .LCPI2_3:
; CHECK-THUMB-NEXT: .long 16843009 @ 0x1010101
%tmp = call i32 @llvm.cttz.i32(i32 %a, i1 false)
ret i32 %tmp
}
define i64 @test_i64(i64 %a) {
; CHECK-LABEL: test_i64:
; CHECK: @ %bb.0:
; CHECK-NEXT: rbit r1, r1
; CHECK-NEXT: rbit r2, r0
; CHECK-NEXT: clz r1, r1
; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: add r1, r1, #32
; CHECK-NEXT: clzne r1, r2
; CHECK-NEXT: mov r0, r1
; CHECK-NEXT: mov r1, #0
; CHECK-NEXT: bx lr
;
; CHECK-THUMB-LABEL: test_i64:
; CHECK-THUMB: @ %bb.0:
; CHECK-THUMB-NEXT: .save {r4, r5, r7, lr}
; CHECK-THUMB-NEXT: push {r4, r5, r7, lr}
; CHECK-THUMB-NEXT: ldr r5, .LCPI3_0
; CHECK-THUMB-NEXT: ldr r4, .LCPI3_1
; CHECK-THUMB-NEXT: ldr r3, .LCPI3_2
; CHECK-THUMB-NEXT: ldr r2, .LCPI3_3
; CHECK-THUMB-NEXT: cmp r0, #0
; CHECK-THUMB-NEXT: bne .LBB3_2
; CHECK-THUMB-NEXT: @ %bb.1:
; CHECK-THUMB-NEXT: subs r0, r1, #1
; CHECK-THUMB-NEXT: bics r0, r1
; CHECK-THUMB-NEXT: lsrs r1, r0, #1
; CHECK-THUMB-NEXT: ands r1, r5
; CHECK-THUMB-NEXT: subs r0, r0, r1
; CHECK-THUMB-NEXT: lsrs r1, r0, #2
; CHECK-THUMB-NEXT: ands r0, r4
; CHECK-THUMB-NEXT: ands r1, r4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ands r0, r3
; CHECK-THUMB-NEXT: muls r2, r0, r2
; CHECK-THUMB-NEXT: lsrs r0, r2, #24
; CHECK-THUMB-NEXT: adds r0, #32
; CHECK-THUMB-NEXT: movs r1, #0
; CHECK-THUMB-NEXT: pop {r4, r5, r7, pc}
; CHECK-THUMB-NEXT: .LBB3_2:
; CHECK-THUMB-NEXT: subs r1, r0, #1
; CHECK-THUMB-NEXT: bics r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r1, #1
; CHECK-THUMB-NEXT: ands r0, r5
; CHECK-THUMB-NEXT: subs r0, r1, r0
; CHECK-THUMB-NEXT: lsrs r1, r0, #2
; CHECK-THUMB-NEXT: ands r0, r4
; CHECK-THUMB-NEXT: ands r1, r4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ands r0, r3
; CHECK-THUMB-NEXT: muls r2, r0, r2
; CHECK-THUMB-NEXT: lsrs r0, r2, #24
; CHECK-THUMB-NEXT: movs r1, #0
; CHECK-THUMB-NEXT: pop {r4, r5, r7, pc}
; CHECK-THUMB-NEXT: .p2align 2
; CHECK-THUMB-NEXT: @ %bb.3:
; CHECK-THUMB-NEXT: .LCPI3_0:
; CHECK-THUMB-NEXT: .long 1431655765 @ 0x55555555
; CHECK-THUMB-NEXT: .LCPI3_1:
; CHECK-THUMB-NEXT: .long 858993459 @ 0x33333333
; CHECK-THUMB-NEXT: .LCPI3_2:
; CHECK-THUMB-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-THUMB-NEXT: .LCPI3_3:
; CHECK-THUMB-NEXT: .long 16843009 @ 0x1010101
%tmp = call i64 @llvm.cttz.i64(i64 %a, i1 false)
ret i64 %tmp
}
;------------------------------------------------------------------------------
define i8 @test_i8_zero_undef(i8 %a) {
; CHECK-LABEL: test_i8_zero_undef:
; CHECK: @ %bb.0:
; CHECK-NEXT: rbit r0, r0
; CHECK-NEXT: clz r0, r0
; CHECK-NEXT: bx lr
;
; CHECK-THUMB-LABEL: test_i8_zero_undef:
; CHECK-THUMB: @ %bb.0:
; CHECK-THUMB-NEXT: subs r1, r0, #1
; CHECK-THUMB-NEXT: bics r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r1, #1
; CHECK-THUMB-NEXT: ldr r2, .LCPI4_0
; CHECK-THUMB-NEXT: ands r2, r0
; CHECK-THUMB-NEXT: subs r0, r1, r2
; CHECK-THUMB-NEXT: ldr r1, .LCPI4_1
; CHECK-THUMB-NEXT: lsrs r2, r0, #2
; CHECK-THUMB-NEXT: ands r0, r1
; CHECK-THUMB-NEXT: ands r2, r1
; CHECK-THUMB-NEXT: adds r0, r0, r2
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ldr r1, .LCPI4_2
; CHECK-THUMB-NEXT: ands r1, r0
; CHECK-THUMB-NEXT: ldr r0, .LCPI4_3
; CHECK-THUMB-NEXT: muls r0, r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r0, #24
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .p2align 2
; CHECK-THUMB-NEXT: @ %bb.1:
; CHECK-THUMB-NEXT: .LCPI4_0:
; CHECK-THUMB-NEXT: .long 1431655765 @ 0x55555555
; CHECK-THUMB-NEXT: .LCPI4_1:
; CHECK-THUMB-NEXT: .long 858993459 @ 0x33333333
; CHECK-THUMB-NEXT: .LCPI4_2:
; CHECK-THUMB-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-THUMB-NEXT: .LCPI4_3:
; CHECK-THUMB-NEXT: .long 16843009 @ 0x1010101
%tmp = call i8 @llvm.cttz.i8(i8 %a, i1 true)
ret i8 %tmp
}
define i16 @test_i16_zero_undef(i16 %a) {
; CHECK-LABEL: test_i16_zero_undef:
; CHECK: @ %bb.0:
; CHECK-NEXT: rbit r0, r0
; CHECK-NEXT: clz r0, r0
; CHECK-NEXT: bx lr
;
; CHECK-THUMB-LABEL: test_i16_zero_undef:
; CHECK-THUMB: @ %bb.0:
; CHECK-THUMB-NEXT: subs r1, r0, #1
; CHECK-THUMB-NEXT: bics r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r1, #1
; CHECK-THUMB-NEXT: ldr r2, .LCPI5_0
; CHECK-THUMB-NEXT: ands r2, r0
; CHECK-THUMB-NEXT: subs r0, r1, r2
; CHECK-THUMB-NEXT: ldr r1, .LCPI5_1
; CHECK-THUMB-NEXT: lsrs r2, r0, #2
; CHECK-THUMB-NEXT: ands r0, r1
; CHECK-THUMB-NEXT: ands r2, r1
; CHECK-THUMB-NEXT: adds r0, r0, r2
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ldr r1, .LCPI5_2
; CHECK-THUMB-NEXT: ands r1, r0
; CHECK-THUMB-NEXT: ldr r0, .LCPI5_3
; CHECK-THUMB-NEXT: muls r0, r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r0, #24
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .p2align 2
; CHECK-THUMB-NEXT: @ %bb.1:
; CHECK-THUMB-NEXT: .LCPI5_0:
; CHECK-THUMB-NEXT: .long 1431655765 @ 0x55555555
; CHECK-THUMB-NEXT: .LCPI5_1:
; CHECK-THUMB-NEXT: .long 858993459 @ 0x33333333
; CHECK-THUMB-NEXT: .LCPI5_2:
; CHECK-THUMB-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-THUMB-NEXT: .LCPI5_3:
; CHECK-THUMB-NEXT: .long 16843009 @ 0x1010101
%tmp = call i16 @llvm.cttz.i16(i16 %a, i1 true)
ret i16 %tmp
}
define i32 @test_i32_zero_undef(i32 %a) {
; CHECK-LABEL: test_i32_zero_undef:
; CHECK: @ %bb.0:
; CHECK-NEXT: rbit r0, r0
; CHECK-NEXT: clz r0, r0
; CHECK-NEXT: bx lr
;
; CHECK-THUMB-LABEL: test_i32_zero_undef:
; CHECK-THUMB: @ %bb.0:
; CHECK-THUMB-NEXT: subs r1, r0, #1
; CHECK-THUMB-NEXT: bics r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r1, #1
; CHECK-THUMB-NEXT: ldr r2, .LCPI6_0
; CHECK-THUMB-NEXT: ands r2, r0
; CHECK-THUMB-NEXT: subs r0, r1, r2
; CHECK-THUMB-NEXT: ldr r1, .LCPI6_1
; CHECK-THUMB-NEXT: lsrs r2, r0, #2
; CHECK-THUMB-NEXT: ands r0, r1
; CHECK-THUMB-NEXT: ands r2, r1
; CHECK-THUMB-NEXT: adds r0, r0, r2
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ldr r1, .LCPI6_2
; CHECK-THUMB-NEXT: ands r1, r0
; CHECK-THUMB-NEXT: ldr r0, .LCPI6_3
; CHECK-THUMB-NEXT: muls r0, r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r0, #24
; CHECK-THUMB-NEXT: bx lr
; CHECK-THUMB-NEXT: .p2align 2
; CHECK-THUMB-NEXT: @ %bb.1:
; CHECK-THUMB-NEXT: .LCPI6_0:
; CHECK-THUMB-NEXT: .long 1431655765 @ 0x55555555
; CHECK-THUMB-NEXT: .LCPI6_1:
; CHECK-THUMB-NEXT: .long 858993459 @ 0x33333333
; CHECK-THUMB-NEXT: .LCPI6_2:
; CHECK-THUMB-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-THUMB-NEXT: .LCPI6_3:
; CHECK-THUMB-NEXT: .long 16843009 @ 0x1010101
%tmp = call i32 @llvm.cttz.i32(i32 %a, i1 true)
ret i32 %tmp
}
define i64 @test_i64_zero_undef(i64 %a) {
; CHECK-LABEL: test_i64_zero_undef:
; CHECK: @ %bb.0:
; CHECK-NEXT: rbit r1, r1
; CHECK-NEXT: rbit r2, r0
; CHECK-NEXT: clz r1, r1
; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: add r1, r1, #32
; CHECK-NEXT: clzne r1, r2
; CHECK-NEXT: mov r0, r1
; CHECK-NEXT: mov r1, #0
; CHECK-NEXT: bx lr
;
; CHECK-THUMB-LABEL: test_i64_zero_undef:
; CHECK-THUMB: @ %bb.0:
; CHECK-THUMB-NEXT: .save {r4, r5, r7, lr}
; CHECK-THUMB-NEXT: push {r4, r5, r7, lr}
; CHECK-THUMB-NEXT: ldr r5, .LCPI7_0
; CHECK-THUMB-NEXT: ldr r4, .LCPI7_1
; CHECK-THUMB-NEXT: ldr r3, .LCPI7_2
; CHECK-THUMB-NEXT: ldr r2, .LCPI7_3
; CHECK-THUMB-NEXT: cmp r0, #0
; CHECK-THUMB-NEXT: bne .LBB7_2
; CHECK-THUMB-NEXT: @ %bb.1:
; CHECK-THUMB-NEXT: subs r0, r1, #1
; CHECK-THUMB-NEXT: bics r0, r1
; CHECK-THUMB-NEXT: lsrs r1, r0, #1
; CHECK-THUMB-NEXT: ands r1, r5
; CHECK-THUMB-NEXT: subs r0, r0, r1
; CHECK-THUMB-NEXT: lsrs r1, r0, #2
; CHECK-THUMB-NEXT: ands r0, r4
; CHECK-THUMB-NEXT: ands r1, r4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ands r0, r3
; CHECK-THUMB-NEXT: muls r2, r0, r2
; CHECK-THUMB-NEXT: lsrs r0, r2, #24
; CHECK-THUMB-NEXT: adds r0, #32
; CHECK-THUMB-NEXT: movs r1, #0
; CHECK-THUMB-NEXT: pop {r4, r5, r7, pc}
; CHECK-THUMB-NEXT: .LBB7_2:
; CHECK-THUMB-NEXT: subs r1, r0, #1
; CHECK-THUMB-NEXT: bics r1, r0
; CHECK-THUMB-NEXT: lsrs r0, r1, #1
; CHECK-THUMB-NEXT: ands r0, r5
; CHECK-THUMB-NEXT: subs r0, r1, r0
; CHECK-THUMB-NEXT: lsrs r1, r0, #2
; CHECK-THUMB-NEXT: ands r0, r4
; CHECK-THUMB-NEXT: ands r1, r4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: lsrs r1, r0, #4
; CHECK-THUMB-NEXT: adds r0, r0, r1
; CHECK-THUMB-NEXT: ands r0, r3
; CHECK-THUMB-NEXT: muls r2, r0, r2
; CHECK-THUMB-NEXT: lsrs r0, r2, #24
; CHECK-THUMB-NEXT: movs r1, #0
; CHECK-THUMB-NEXT: pop {r4, r5, r7, pc}
; CHECK-THUMB-NEXT: .p2align 2
; CHECK-THUMB-NEXT: @ %bb.3:
; CHECK-THUMB-NEXT: .LCPI7_0:
; CHECK-THUMB-NEXT: .long 1431655765 @ 0x55555555
; CHECK-THUMB-NEXT: .LCPI7_1:
; CHECK-THUMB-NEXT: .long 858993459 @ 0x33333333
; CHECK-THUMB-NEXT: .LCPI7_2:
; CHECK-THUMB-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-THUMB-NEXT: .LCPI7_3:
; CHECK-THUMB-NEXT: .long 16843009 @ 0x1010101
%tmp = call i64 @llvm.cttz.i64(i64 %a, i1 true)
ret i64 %tmp
}
|
