1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define void @add_i32() {entry: ret void}
define void @add_imm() {entry: ret void}
define void @add_negative_imm() {entry: ret void}
define void @add_not_imm32SExt16() {entry: ret void}
...
---
name: add_i32
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: add_i32
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY]], [[COPY1]]
; MIPS32: $v0 = COPY [[ADDu]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = COPY $a1
%2:gprb(s32) = G_ADD %0, %1
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: add_imm
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: add_imm
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[COPY]], 3
; MIPS32: $v0 = COPY [[ADDiu]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = G_CONSTANT i32 3
%2:gprb(s32) = G_ADD %0, %1
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: add_negative_imm
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: add_negative_imm
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[COPY]], -3
; MIPS32: $v0 = COPY [[ADDiu]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = G_CONSTANT i32 -3
%2:gprb(s32) = G_ADD %0, %1
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: add_not_imm32SExt16
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: add_not_imm32SExt16
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 65535
; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY]], [[ORi]]
; MIPS32: $v0 = COPY [[ADDu]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = G_CONSTANT i32 65535
%2:gprb(s32) = G_ADD %0, %1
$v0 = COPY %2(s32)
RetRA implicit $v0
...
|
