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|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define i32 @indirectbr(i8* %addr) {
entry:
indirectbr i8* %addr, [label %L1, label %L2]
L1:
ret i32 0
L2:
ret i32 1
}
...
---
name: indirectbr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; MIPS32-LABEL: name: indirectbr
; MIPS32: bb.0.entry:
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 1
; MIPS32: [[ORi1:%[0-9]+]]:gpr32 = ORi $zero, 0
; MIPS32: PseudoIndirectBranch [[COPY]]
; MIPS32: bb.1.L1:
; MIPS32: $v0 = COPY [[ORi1]]
; MIPS32: RetRA implicit $v0
; MIPS32: bb.2.L2:
; MIPS32: $v0 = COPY [[ORi]]
; MIPS32: RetRA implicit $v0
bb.1.entry:
successors: %bb.2, %bb.3
liveins: $a0
%0:gprb(p0) = COPY $a0
%1:gprb(s32) = G_CONSTANT i32 1
%2:gprb(s32) = G_CONSTANT i32 0
G_BRINDIRECT %0(p0)
bb.2.L1:
$v0 = COPY %2(s32)
RetRA implicit $v0
bb.3.L2:
$v0 = COPY %1(s32)
RetRA implicit $v0
...
|
