File: micromips-atomic.ll

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llvm-toolchain-15 1%3A15.0.6-4
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc %s -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r2 -mattr=micromips -filetype=asm \
; RUN: -relocation-model=pic -o - | FileCheck %s

@x = common global i32 0, align 4

define i32 @AtomicLoadAdd32(i32 %incr) nounwind {
; CHECK-LABEL: AtomicLoadAdd32:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lui $2, %hi(_gp_disp)
; CHECK-NEXT:    addiu $2, $2, %lo(_gp_disp)
; CHECK-NEXT:    addu $2, $2, $25
; CHECK-NEXT:    lw $1, %got(x)($2)
; CHECK-NEXT:  $BB0_1: # %entry
; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    ll $2, 0($1)
; CHECK-NEXT:    addu16 $3, $2, $4
; CHECK-NEXT:    sc $3, 0($1)
; CHECK-NEXT:    beqzc $3, $BB0_1
; CHECK-NEXT:  # %bb.2: # %entry
; CHECK-NEXT:    jrc $ra
entry:
  %0 = atomicrmw add i32* @x, i32 %incr monotonic
  ret i32 %0
}