File: hard-quad-float.ll

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llvm-toolchain-15 1%3A15.0.6-4
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=sparc64-unknown-linux-gnu | FileCheck %s --check-prefixes=SPARC64

define fp128 @fpselect_softfloat(i32 signext %0, fp128 %1, fp128 %2) #0 {
; SPARC64-LABEL: fpselect_softfloat:
; SPARC64:         .cfi_startproc
; SPARC64-NEXT:  ! %bb.0:
; SPARC64-NEXT:    cmp %o0, 0
; SPARC64-NEXT:    fmovd %f8, %f0
; SPARC64-NEXT:    fmovd %f10, %f2
; SPARC64-NEXT:    be .LBB0_2
; SPARC64-NEXT:    nop
; SPARC64-NEXT:  ! %bb.1:
; SPARC64-NEXT:    fmovd %f4, %f0
; SPARC64-NEXT:    fmovd %f6, %f2
; SPARC64-NEXT:  .LBB0_2:
; SPARC64-NEXT:    retl
; SPARC64-NEXT:    nop
  %a = icmp eq i32 %0, 0
  %b = select i1 %a, fp128 %2, fp128 %1
  ret fp128 %b
}

define fp128 @fpselect_hardfloat(i32 signext %0, fp128 %1, fp128 %2) #1 {
; SPARC64-LABEL: fpselect_hardfloat:
; SPARC64:         .cfi_startproc
; SPARC64-NEXT:  ! %bb.0:
; SPARC64-NEXT:    fmovq %f4, %f0
; SPARC64-NEXT:    cmp %o0, 0
; SPARC64-NEXT:    retl
; SPARC64-NEXT:    fmovqe %icc, %f8, %f0
  %a = icmp eq i32 %0, 0
  %b = select i1 %a, fp128 %2, fp128 %1
  ret fp128 %b
}

attributes #0 = { "target-features"="-hard-quad-float" }
attributes #1 = { "target-features"="+hard-quad-float" }