1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -gvn -enable-load-pre < %s | FileCheck %s
;
; Make sure the load in bb3.backedge is removed and moved into bb1 after the
; call. This makes the non-call case faster.
;
; This test is derived from this C++ code (GCC PR 37810):
; void g();
; struct A {
; int n; int m;
; A& operator++(void) { ++n; if (n == m) g(); return *this; }
; A() : n(0), m(0) { }
; friend bool operator!=(A const& a1, A const& a2) { return a1.n != a2.n; }
; };
; void testfunction(A& iter) { A const end; while (iter != end) ++iter; }
;
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
%struct.A = type { i32, i32 }
define void @_Z12testfunctionR1A(%struct.A* %iter) {
; CHECK-LABEL: @_Z12testfunctionR1A(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_A:%.*]], %struct.A* [[ITER:%.*]], i32 0, i32 0
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label [[RETURN:%.*]], label [[BB_NPH:%.*]]
; CHECK: bb.nph:
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_A]], %struct.A* [[ITER]], i32 0, i32 1
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[DOTRLE:%.*]] = phi i32 [ [[TMP1]], [[BB_NPH]] ], [ [[TMP7:%.*]], [[BB3_BACKEDGE:%.*]] ]
; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[DOTRLE]], 1
; CHECK-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4
; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]], align 4
; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP4]], [[TMP5]]
; CHECK-NEXT: br i1 [[TMP6]], label [[BB1:%.*]], label [[BB3_BACKEDGE]]
; CHECK: bb1:
; CHECK-NEXT: tail call void @_Z1gv()
; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[TMP0]], align 4
; CHECK-NEXT: br label [[BB3_BACKEDGE]]
; CHECK: bb3.backedge:
; CHECK-NEXT: [[TMP7]] = phi i32 [ [[DOTPRE]], [[BB1]] ], [ [[TMP4]], [[BB]] ]
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
; CHECK-NEXT: br i1 [[TMP8]], label [[RETURN]], label [[BB]]
; CHECK: return:
; CHECK-NEXT: ret void
;
entry:
%0 = getelementptr %struct.A, %struct.A* %iter, i32 0, i32 0 ; <i32*> [#uses=3]
%1 = load i32, i32* %0, align 4 ; <i32> [#uses=2]
%2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
br i1 %2, label %return, label %bb.nph
bb.nph: ; preds = %entry
%3 = getelementptr %struct.A, %struct.A* %iter, i32 0, i32 1 ; <i32*> [#uses=1]
br label %bb
bb: ; preds = %bb3.backedge, %bb.nph
%.rle = phi i32 [ %1, %bb.nph ], [ %7, %bb3.backedge ] ; <i32> [#uses=1]
%4 = add i32 %.rle, 1 ; <i32> [#uses=2]
store i32 %4, i32* %0, align 4
%5 = load i32, i32* %3, align 4 ; <i32> [#uses=1]
%6 = icmp eq i32 %4, %5 ; <i1> [#uses=1]
br i1 %6, label %bb1, label %bb3.backedge
bb1: ; preds = %bb
tail call void @_Z1gv()
br label %bb3.backedge
bb3.backedge: ; preds = %bb, %bb1
%7 = load i32, i32* %0, align 4 ; <i32> [#uses=2]
%8 = icmp eq i32 %7, 0 ; <i1> [#uses=1]
br i1 %8, label %return, label %bb
return: ; preds = %bb3.backedge, %entry
ret void
}
declare void @_Z1gv()
|
