1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
@var1_32 = global i32 0
@var2_32 = global i32 0
@var1_64 = global i64 0
@var2_64 = global i64 0
define void @logical_32bit() minsize {
; CHECK-LABEL: logical_32bit:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, :got:var1_32
; CHECK-NEXT: adrp x9, :got:var2_32
; CHECK-NEXT: ldr x8, [x8, :got_lo12:var1_32]
; CHECK-NEXT: ldr x9, [x9, :got_lo12:var2_32]
; CHECK-NEXT: ldr w10, [x8]
; CHECK-NEXT: ldr w9, [x9]
; CHECK-NEXT: and w11, w10, w9
; CHECK-NEXT: bic w12, w10, w9
; CHECK-NEXT: orr w13, w10, w9
; CHECK-NEXT: str w11, [x8]
; CHECK-NEXT: orn w11, w10, w9
; CHECK-NEXT: str w12, [x8]
; CHECK-NEXT: eor w12, w10, w9
; CHECK-NEXT: str w13, [x8]
; CHECK-NEXT: eon w13, w9, w10
; CHECK-NEXT: str w11, [x8]
; CHECK-NEXT: and w11, w10, w9, lsl #31
; CHECK-NEXT: str w12, [x8]
; CHECK-NEXT: bic w12, w10, w9, lsl #31
; CHECK-NEXT: str w13, [x8]
; CHECK-NEXT: orr w13, w10, w9, lsl #31
; CHECK-NEXT: str w11, [x8]
; CHECK-NEXT: orn w11, w10, w9, lsl #31
; CHECK-NEXT: str w12, [x8]
; CHECK-NEXT: eor w12, w10, w9, lsl #31
; CHECK-NEXT: str w13, [x8]
; CHECK-NEXT: eon w13, w10, w9, lsl #31
; CHECK-NEXT: str w11, [x8]
; CHECK-NEXT: bic w11, w10, w9, asr #10
; CHECK-NEXT: str w12, [x8]
; CHECK-NEXT: eor w12, w10, w9, asr #10
; CHECK-NEXT: str w13, [x8]
; CHECK-NEXT: orn w13, w10, w9, lsr #1
; CHECK-NEXT: str w11, [x8]
; CHECK-NEXT: eor w11, w10, w9, lsr #1
; CHECK-NEXT: str w12, [x8]
; CHECK-NEXT: eon w12, w10, w9, ror #20
; CHECK-NEXT: and w9, w10, w9, ror #20
; CHECK-NEXT: str w13, [x8]
; CHECK-NEXT: str w11, [x8]
; CHECK-NEXT: str w12, [x8]
; CHECK-NEXT: str w9, [x8]
; CHECK-NEXT: ret
%val1 = load i32, ptr @var1_32
%val2 = load i32, ptr @var2_32
; First check basic and/bic/or/orn/eor/eon patterns with no shift
%neg_val2 = xor i32 -1, %val2
%and_noshift = and i32 %val1, %val2
store volatile i32 %and_noshift, ptr @var1_32
%bic_noshift = and i32 %neg_val2, %val1
store volatile i32 %bic_noshift, ptr @var1_32
%or_noshift = or i32 %val1, %val2
store volatile i32 %or_noshift, ptr @var1_32
%orn_noshift = or i32 %neg_val2, %val1
store volatile i32 %orn_noshift, ptr @var1_32
%xor_noshift = xor i32 %val1, %val2
store volatile i32 %xor_noshift, ptr @var1_32
%xorn_noshift = xor i32 %neg_val2, %val1
store volatile i32 %xorn_noshift, ptr @var1_32
; Check the maximum shift on each
%operand_lsl31 = shl i32 %val2, 31
%neg_operand_lsl31 = xor i32 -1, %operand_lsl31
%and_lsl31 = and i32 %val1, %operand_lsl31
store volatile i32 %and_lsl31, ptr @var1_32
%bic_lsl31 = and i32 %val1, %neg_operand_lsl31
store volatile i32 %bic_lsl31, ptr @var1_32
%or_lsl31 = or i32 %val1, %operand_lsl31
store volatile i32 %or_lsl31, ptr @var1_32
%orn_lsl31 = or i32 %val1, %neg_operand_lsl31
store volatile i32 %orn_lsl31, ptr @var1_32
%xor_lsl31 = xor i32 %val1, %operand_lsl31
store volatile i32 %xor_lsl31, ptr @var1_32
%xorn_lsl31 = xor i32 %val1, %neg_operand_lsl31
store volatile i32 %xorn_lsl31, ptr @var1_32
; Check other shifts on a subset
%operand_asr10 = ashr i32 %val2, 10
%neg_operand_asr10 = xor i32 -1, %operand_asr10
%bic_asr10 = and i32 %val1, %neg_operand_asr10
store volatile i32 %bic_asr10, ptr @var1_32
%xor_asr10 = xor i32 %val1, %operand_asr10
store volatile i32 %xor_asr10, ptr @var1_32
%operand_lsr1 = lshr i32 %val2, 1
%neg_operand_lsr1 = xor i32 -1, %operand_lsr1
%orn_lsr1 = or i32 %val1, %neg_operand_lsr1
store volatile i32 %orn_lsr1, ptr @var1_32
%xor_lsr1 = xor i32 %val1, %operand_lsr1
store volatile i32 %xor_lsr1, ptr @var1_32
%operand_ror20_big = shl i32 %val2, 12
%operand_ror20_small = lshr i32 %val2, 20
%operand_ror20 = or i32 %operand_ror20_big, %operand_ror20_small
%neg_operand_ror20 = xor i32 -1, %operand_ror20
%xorn_ror20 = xor i32 %val1, %neg_operand_ror20
store volatile i32 %xorn_ror20, ptr @var1_32
%and_ror20 = and i32 %val1, %operand_ror20
store volatile i32 %and_ror20, ptr @var1_32
ret void
}
define void @logical_64bit() minsize {
; CHECK-LABEL: logical_64bit:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, :got:var1_64
; CHECK-NEXT: adrp x9, :got:var2_64
; CHECK-NEXT: ldr x8, [x8, :got_lo12:var1_64]
; CHECK-NEXT: ldr x9, [x9, :got_lo12:var2_64]
; CHECK-NEXT: ldr x10, [x8]
; CHECK-NEXT: ldr x9, [x9]
; CHECK-NEXT: and x11, x10, x9
; CHECK-NEXT: bic x12, x10, x9
; CHECK-NEXT: orr x13, x10, x9
; CHECK-NEXT: str x11, [x8]
; CHECK-NEXT: orn x11, x10, x9
; CHECK-NEXT: str x12, [x8]
; CHECK-NEXT: eor x12, x10, x9
; CHECK-NEXT: str x13, [x8]
; CHECK-NEXT: eon x13, x9, x10
; CHECK-NEXT: str x11, [x8]
; CHECK-NEXT: and x11, x10, x9, lsl #63
; CHECK-NEXT: str x12, [x8]
; CHECK-NEXT: bic x12, x10, x9, lsl #63
; CHECK-NEXT: str x13, [x8]
; CHECK-NEXT: orr x13, x10, x9, lsl #63
; CHECK-NEXT: str x11, [x8]
; CHECK-NEXT: orn x11, x10, x9, lsl #63
; CHECK-NEXT: str x12, [x8]
; CHECK-NEXT: eor x12, x10, x9, lsl #63
; CHECK-NEXT: str x13, [x8]
; CHECK-NEXT: eon x13, x10, x9, lsl #63
; CHECK-NEXT: str x11, [x8]
; CHECK-NEXT: bic x11, x10, x9, asr #10
; CHECK-NEXT: str x12, [x8]
; CHECK-NEXT: eor x12, x10, x9, asr #10
; CHECK-NEXT: str x13, [x8]
; CHECK-NEXT: orn x13, x10, x9, lsr #1
; CHECK-NEXT: str x11, [x8]
; CHECK-NEXT: eor x11, x10, x9, lsr #1
; CHECK-NEXT: str x12, [x8]
; CHECK-NEXT: eon x12, x10, x9, ror #20
; CHECK-NEXT: and x9, x10, x9, ror #20
; CHECK-NEXT: str x13, [x8]
; CHECK-NEXT: str x11, [x8]
; CHECK-NEXT: str x12, [x8]
; CHECK-NEXT: str x9, [x8]
; CHECK-NEXT: ret
%val1 = load i64, ptr @var1_64
%val2 = load i64, ptr @var2_64
; First check basic and/bic/or/orn/eor/eon patterns with no shift
%neg_val2 = xor i64 -1, %val2
%and_noshift = and i64 %val1, %val2
store volatile i64 %and_noshift, ptr @var1_64
%bic_noshift = and i64 %neg_val2, %val1
store volatile i64 %bic_noshift, ptr @var1_64
%or_noshift = or i64 %val1, %val2
store volatile i64 %or_noshift, ptr @var1_64
%orn_noshift = or i64 %neg_val2, %val1
store volatile i64 %orn_noshift, ptr @var1_64
%xor_noshift = xor i64 %val1, %val2
store volatile i64 %xor_noshift, ptr @var1_64
%xorn_noshift = xor i64 %neg_val2, %val1
store volatile i64 %xorn_noshift, ptr @var1_64
; Check the maximum shift on each
%operand_lsl63 = shl i64 %val2, 63
%neg_operand_lsl63 = xor i64 -1, %operand_lsl63
%and_lsl63 = and i64 %val1, %operand_lsl63
store volatile i64 %and_lsl63, ptr @var1_64
%bic_lsl63 = and i64 %val1, %neg_operand_lsl63
store volatile i64 %bic_lsl63, ptr @var1_64
%or_lsl63 = or i64 %val1, %operand_lsl63
store volatile i64 %or_lsl63, ptr @var1_64
%orn_lsl63 = or i64 %val1, %neg_operand_lsl63
store volatile i64 %orn_lsl63, ptr @var1_64
%xor_lsl63 = xor i64 %val1, %operand_lsl63
store volatile i64 %xor_lsl63, ptr @var1_64
%xorn_lsl63 = xor i64 %val1, %neg_operand_lsl63
store volatile i64 %xorn_lsl63, ptr @var1_64
; Check other shifts on a subset
%operand_asr10 = ashr i64 %val2, 10
%neg_operand_asr10 = xor i64 -1, %operand_asr10
%bic_asr10 = and i64 %val1, %neg_operand_asr10
store volatile i64 %bic_asr10, ptr @var1_64
%xor_asr10 = xor i64 %val1, %operand_asr10
store volatile i64 %xor_asr10, ptr @var1_64
%operand_lsr1 = lshr i64 %val2, 1
%neg_operand_lsr1 = xor i64 -1, %operand_lsr1
%orn_lsr1 = or i64 %val1, %neg_operand_lsr1
store volatile i64 %orn_lsr1, ptr @var1_64
%xor_lsr1 = xor i64 %val1, %operand_lsr1
store volatile i64 %xor_lsr1, ptr @var1_64
; Construct a rotate-right from a bunch of other logical
; operations. DAGCombiner should ensure we the ROTR during
; selection
%operand_ror20_big = shl i64 %val2, 44
%operand_ror20_small = lshr i64 %val2, 20
%operand_ror20 = or i64 %operand_ror20_big, %operand_ror20_small
%neg_operand_ror20 = xor i64 -1, %operand_ror20
%xorn_ror20 = xor i64 %val1, %neg_operand_ror20
store volatile i64 %xorn_ror20, ptr @var1_64
%and_ror20 = and i64 %val1, %operand_ror20
store volatile i64 %and_ror20, ptr @var1_64
ret void
}
define void @flag_setting() {
; CHECK-LABEL: flag_setting:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, :got:var1_64
; CHECK-NEXT: adrp x10, :got:var2_64
; CHECK-NEXT: ldr x8, [x8, :got_lo12:var1_64]
; CHECK-NEXT: ldr x10, [x10, :got_lo12:var2_64]
; CHECK-NEXT: ldr x9, [x8]
; CHECK-NEXT: ldr x10, [x10]
; CHECK-NEXT: tst x9, x10
; CHECK-NEXT: b.gt .LBB2_2
; CHECK-NEXT: // %bb.1: // %test2
; CHECK-NEXT: tst x9, x10, lsl #63
; CHECK-NEXT: and x10, x9, x10, asr #12
; CHECK-NEXT: ccmp x10, #1, #0, ge
; CHECK-NEXT: b.lt .LBB2_3
; CHECK-NEXT: .LBB2_2: // %common.ret
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB2_3: // %other_exit
; CHECK-NEXT: str x9, [x8]
; CHECK-NEXT: ret
%val1 = load i64, ptr @var1_64
%val2 = load i64, ptr @var2_64
%simple_and = and i64 %val1, %val2
%tst1 = icmp sgt i64 %simple_and, 0
br i1 %tst1, label %ret, label %test2, !prof !1
test2:
%shifted_op = shl i64 %val2, 63
%shifted_and = and i64 %val1, %shifted_op
%tst2 = icmp slt i64 %shifted_and, 0
br i1 %tst2, label %ret, label %test3, !prof !1
test3:
%asr_op = ashr i64 %val2, 12
%asr_and = and i64 %asr_op, %val1
%tst3 = icmp sgt i64 %asr_and, 0
br i1 %tst3, label %ret, label %other_exit, !prof !1
other_exit:
store volatile i64 %val1, ptr @var1_64
ret void
ret:
ret void
}
define i64 @add_swap_rhs_lhs_i64(i64 %0, i64 %1) {
; CHECK-LABEL: add_swap_rhs_lhs_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: lsl x8, x0, #8
; CHECK-NEXT: add x0, x8, x1, lsl #3
; CHECK-NEXT: ret
%3 = shl i64 %0, 8
%4 = shl i64 %1, 3
%5 = add i64 %4, %3
ret i64 %5
}
define i64 @add_swap_no_op_i64(i64 %0, i64 %1, ptr %2) {
; CHECK-LABEL: add_swap_no_op_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: lsl x8, x1, #3
; CHECK-NEXT: add x0, x8, x0, lsl #8
; CHECK-NEXT: str x8, [x2]
; CHECK-NEXT: ret
%4 = shl i64 %0, 8
%5 = shl i64 %1, 3
store i64 %5, ptr %2
%6 = add i64 %5, %4
ret i64 %6
}
define i32 @add_swap_rhs_lhs_i32(i32 %0, i32 %1) {
; CHECK-LABEL: add_swap_rhs_lhs_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: lsl w8, w0, #8
; CHECK-NEXT: add w0, w8, w1, lsl #3
; CHECK-NEXT: ret
%3 = shl i32 %0, 8
%4 = shl i32 %1, 3
%5 = add i32 %4, %3
ret i32 %5
}
define i32 @add_swap_no_op_i32(i32 %0, i32 %1, ptr %2) {
; CHECK-LABEL: add_swap_no_op_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: lsl w8, w1, #3
; CHECK-NEXT: add w0, w8, w0, lsl #8
; CHECK-NEXT: str w8, [x2]
; CHECK-NEXT: ret
%4 = shl i32 %0, 8
%5 = shl i32 %1, 3
store i32 %5, ptr %2
%6 = add i32 %5, %4
ret i32 %6
}
!1 = !{!"branch_weights", i32 1, i32 1}
|
