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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
---
name: add_nullptr_shl_add
tracksRegLiveness: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: add_nullptr_shl_add
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: $vgpr0 = COPY [[SHL]](s32)
%0:_(s32) = COPY $sgpr0
%1:_(s32) = G_CONSTANT i32 3
%2:_(s32) = G_SHL %0, %1(s32)
%3:_(p3) = G_CONSTANT i32 0
%4:_(p3) = G_PTR_ADD %3, %2(s32)
%5:_(s32) = G_PTRTOINT %4(p3)
$vgpr0 = COPY %5(s32)
...
---
name: add_nullptr_mul_add
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: add_nullptr_mul_add
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]]
; CHECK-NEXT: $vgpr0 = COPY [[MUL]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(p3) = G_CONSTANT i32 0
%3:_(s32) = G_MUL %0:_, %1:_
%4:_(p3) = G_PTR_ADD %2:_, %3:_(s32)
%5:_(s32) = G_PTRTOINT %4:_(p3)
$vgpr0 = COPY %5:_(s32)
...
---
name: add_nullptr_vec_all_zero
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3
; CHECK-LABEL: name: add_nullptr_vec_all_zero
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr3
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(<2 x s32>) = G_SHL [[COPY]], [[BUILD_VECTOR]](<2 x s32>)
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[SHL]](<2 x s32>)
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s32) = COPY $vgpr3
%3:_(<2 x s32>) = G_BUILD_VECTOR %1:_(s32), %2:_(s32)
%4:_(<2 x s32>) = G_SHL %0, %3(<2 x s32>)
%5:_(p3) = G_CONSTANT i32 0
%6:_(<2 x p3>) = G_BUILD_VECTOR %5:_(p3), %5:_(p3)
%7:_(<2 x p3>) = G_PTR_ADD %6, %4(<2 x s32>)
%8:_(<2 x s32>) = G_PTRTOINT %7(<2 x p3>)
$vgpr0_vgpr1 = COPY %8(<2 x s32>)
...
|
